Simulation of GeSn/Ge tunneling field-effect transistors for complementary logic applications

被引：13

作者：

Liu, Lei ^{[1
]}

Liang, Renrong ^{[1
]}

Wang, Jing ^{[1
]}

Xiao, Lei ^{[1
]}

Xu, Jun ^{[1
]}

机构：

[1] Tsinghua Univ, Inst Microelect, Tsinghua Natl Lab Informat Sci & Technol, Beijing 100084, Peoples R China

来源：

APPLIED PHYSICS EXPRESS | 2016年 / 9卷 / 09期

基金：

中国国家自然科学基金;

关键词：

D O I：

10.7567/APEX.9.091301

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

GeSn/Ge tunneling field-effect transistors (TFETs) with different device configurations are comprehensively investigated by numerical simulation. The lateral PIN-and PNPN-type point-tunneling and vertical line-tunneling device structures are analyzed and compared. Both n- and p-type TFETs are optimized to construct GeSn complementary logic applications. Simulation results indicate that GeSn/Ge heterochannel and heterosource structures significantly improve the device characteristics of point- and line-TFETs, respectively. Device performance and subthreshold swing can be further improved by increasing the Sn composition. GeSn/Ge heterosource line-TFETs exhibit excellent device performance and superior inverter voltage-transfer characteristic, which make them promising candidates for GeSn complementary TFET applications. (C) 2016 The Japan Society of Applied Physics

引用

页数：4

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