Controlling the amount of Si-OH bonds for the formation of high-quality low-temperature gate oxides for poly-Si TFTS

被引:4
|
作者
Yuda, K [1 ]
Tanabe, H [1 ]
Sera, K [1 ]
Okumura, F [1 ]
机构
[1] NEC Corp Ltd, Funct Devices Res Labs, Miyamae Ku, Kawasaki, Kanagawa 2168555, Japan
来源
关键词
D O I
10.1557/PROC-508-167
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Lowering process temperatures for polysilicon thin-film-transistors (TFTs) has given rise to new worries about the quality of TFT gate oxides. Specifically, presence of large amounts of Si-OH bonds in gate oxides has become a matter of concern. We discuss methods for suppressing the formation of SI-OH bonds during chemical vapor deposition (CVD) of low-temperature processed (LTP) gate oxides. The use of remote-plasma CVD and control of the reaction between the silicon source gas and the oxygen source gas are both shown to be effective. We also show that decreased amounts of SI-OH bonds in LTP-CVD gate oxides result in desirable decreases in fixed oxide charge densities.
引用
收藏
页码:167 / 172
页数:6
相关论文
共 50 条
  • [1] Controlling the amount of Si-OH bonds for the formation of high-quality low-temperature gate oxides for poly-Si TFTs
    Yuda, K
    Tanabe, H
    NEC RESEARCH & DEVELOPMENT, 1999, 40 (04): : 441 - 445
  • [2] Controlling the amount of Si-OH bonds for the formation of high-quality low-temperature gate oxides for poly-Si TFTs
    Yuda, Katsuhisa
    Tanabe, Hiroshi
    NEC Research and Development, 1999, 40 (04): : 441 - 445
  • [3] High-quality low-temperature gate oxide for poly-Si TFTs
    Okumura, F
    Yuda, K
    PROCEEDINGS OF THE FOURTH SYMPOSIUM ON THIN FILM TRANSISTOR TECHNOLOGIES, 1999, 98 (22): : 133 - 142
  • [4] HIGH-QUALITY GATE-OXIDE FILMS FOR LOW-TEMPERATURE FABRICATED POLY-SI TFTS
    SUYAMA, S
    OKAMOTO, A
    SHIRAI, S
    SERIKAWA, T
    RAPID THERMAL ANNEALING / CHEMICAL VAPOR DEPOSITION AND INTEGRATED PROCESSING, 1989, 146 : 301 - 306
  • [5] Printing formation of low-temperature poly-Si TFTs
    Furusawa, M.
    Tanaka, H.
    Kamakura, T.
    Shimoda, T.
    IDW '06: PROCEEDINGS OF THE 13TH INTERNATIONAL DISPLAY WORKSHOPS, VOLS 1-3, 2006, : 1655 - +
  • [6] High-performance low-temperature poly-Si TFTs and circuits
    Asada, H
    Sera, K
    Okumura, F
    NEC RESEARCH & DEVELOPMENT, 1999, 40 (04): : 433 - 436
  • [7] High-performance low-temperature poly-Si TFTs and circuits
    Asada, Hideki
    Sera, Kenji
    Okumura, Fujio
    NEC Research and Development, 1999, 40 (04): : 433 - 436
  • [8] Silicon epitaxial growth on poly-Si film by HWCVD for low-temperature poly-Si TFTs
    Lee, Seung Ryul
    Ahn, Kyung Min
    Ahn, Byung Tae
    JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 2007, 154 (09) : H778 - H781
  • [9] Low temperature high k dielectric on poly-Si TFTs
    Pereira, L.
    Barquinha, P.
    Fortunato, E.
    Martins, R.
    JOURNAL OF NON-CRYSTALLINE SOLIDS, 2008, 354 (19-25) : 2534 - 2537
  • [10] Characteristics of low-temperature poly-Si TFTs on Al/glass substrates
    Mishima, Y
    Yoshino, K
    Takei, M
    Sasaki, N
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2001, 48 (06) : 1087 - 1091