A low-voltage MOS cascode bias circuit for all current levels

In this paper, we describe a simple low-voltage MOS cascode bias circuit that functions well at all current levels, ranging from weak inversion to strong inversion. We describe an approach to defining the onset of saturation that is generally useful from a bias-circuit design viewpoint and explain specifically how it was used in designing the low-voltage cascode bias circuit. We discuss an efficient strategy for laying out the cell in the full-stacked style. We also present experimental results from a version of the bias circuit that was fabricated in a 1.2-mum CMOS process.