SMT-Based Variability Analyses in FeatureIDE

被引:17
|
作者
Sprey, Joshua [1 ]
Sundermann, Chico [1 ]
Krieter, Sebastian [2 ,3 ]
Nieke, Michael [1 ]
Mauro, Jacopo [4 ]
Thiim, Thomas [5 ]
Schaefer, Ina [1 ]
机构
[1] TU Braunschweig, Braunschweig, Germany
[2] Otto Guericke Univ, Magdeburg, Germany
[3] Harz Univ Appl Sci, Wernigerode, Germany
[4] Univ Southern Denmark, Odense, Denmark
[5] Univ Ulm, Ulm, Germany
关键词
variability analysis; feature models; smt; smt analysis; sat; sat analysis; sat vs smt; feature model analysis; configuration analysis; preprocessor analysis; attribute optimization; feature attributes; AUTOMATED-ANALYSIS; FEATURE MODELS; FRAMEWORK;
D O I
10.1145/3377024.3377036
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
Handling configurable systems with thousands of configuration options is a challenging problem in research and industry. One of the most common approaches to manage the configuration options of large systems is variability modelling. The verification and configuration process of large variability models is manually infeasible. Hence, they are usually assisted by automated analyses based on solving satisfiability problems (SAT). Recent advances in satisfiability modulo theories (SMT) could prove SMT solvers as a viable alternative to SAT solvers. However, SMT solvers are typically not utilized for variability analyses. A comparison for SAT and SMT could help to estimate SMT solvers potential for the automated analysis. We integrated two SMT solvers into FeatureIDE and compared them against a SAT solver on analyses for feature models, configurations, and realization artifacts. We give an overview of all variability analyses in FeatureIDE and present the results of our empirical evaluation for over 122 systems. We observed that SMT solvers are generally faster in generating explanations of unsatisfiable requests. However, the evaluated SAT solver outperformed SMT solvers for other analyses.
引用
收藏
页数:9
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