A pipelined 8x8 2-D forward DCT hardware architecture for H.264/AVC high profile encoder

被引:0
|
作者
da Silva, Thaisa Leal [1 ]
Diniz, Claudio Machado [1 ]
Vortmann, Joao Alberto [2 ]
Agostini, Luciano Volcan [2 ]
Susin, Altamiro Amadeu [1 ]
Bampi, Sergio [1 ]
机构
[1] Univ Fed Rio Grande do Sul, Microelect Grp, Porto Alegre, RS, Brazil
[2] Univ Fed Pelotas, Grp Architectures & Integrated Circuits, Pelotas, RS, Brazil
关键词
video compression; 8x8 2-D DCT; H.264/AVC standard; architectural design;
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
This paper presents the hardware design of an W bi-dimensional Forward Discrete Cosine Transform used in the high profiles of the H.264/AVC video coding standard. The designed DCT is computed in a separate way as two 1-D transforms. It uses only add and shift operations, avoiding multiplications. The architecture contains one datapath for each 1-D DCT with a transpose buffer between them. The complete architecture was synthesized to Xilinx Virtex II - Pro and Altera Stratix II FPGAs and to TSMC 0.35 mu m standard-cells technology. The synthesis results show that the 2-D DCT transform architecture reached the necessary throughput to encode high definition videos in real-time when considering all target technologies.
引用
收藏
页码:5 / +
页数:3
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