Superior Memory of Er-Doped TiO2 Nanowire MOS Capacitor

被引：29

作者：

Lahiri, Rini ^{[1
]}

Mondal, Aniruddha ^{[2
]}

机构：

[1] Natl Inst Technol Nagaland, Dept Elect & Commun Engn, Dimapur 797103, India

[2] Natl Inst Technol Durgapur, Dept Phys, Durgapur 713209, India

来源：

IEEE ELECTRON DEVICE LETTERS | 2018年 / 39卷 / 12期

关键词：

Capacitive memory; Er:TiO2; hysteresis; flat band voltage shift; memory window; nanowire; endurance; retention; GATE DIELECTRICS; THIN-FILMS; PERFORMANCE; FABRICATION; DEPOSITION;

D O I：

10.1109/LED.2018.2874272

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The capacitive memory of erbium (Er)-doped nanowire (NW) has been reported. The TiO2 and Er:TiO2 NWs' active layer sandwiched between Au and Si has been used for this study. The capacitance (C)-voltage (V) and conductance (G)-voltage (V) characteristics have been studied for different high frequencies ranging from 1 to 10 MHz. Most importantly, C-V hysteresis for various sweeping voltages (+/- 2, +/- 4, +/- 6, +/- 8, and +/- 10 V) was measured for both the devices. Er:TiO2 NW device depicted an extreme C-V hysteresis as well as memory window of similar to 3.52 V at +/- 10 V. Moreover, Er:TiO2 NW device also exhibited a lowvalue of interface trap density D-it similar to 8.72x10(10) eV(-1)cm(-2) and good endurance and retention properties.

引用

页码：1856 / 1859

页数：4

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