High Resistivity SOI wafer for mainstream RF System-on-Chip

被引：0
|
作者：
Raskin, Jean-Pierre [1 ]
Desbonnets, Eric [2 ]
机构：
[1] UCL, Inst Informat & Commun Technol, Elect & Appl Math, Pl Levant 3, B-1348 Louvain, Belgium
[2] Soitec, F-38190 Bernin, France
来源：
2015 IEEE 15TH TOPICAL MEETING ON SILICON MONOLITHIC INTEGRATED CIRCUITS IN RF SYSTEMS (SIRF) | 2015年
关键词：
Silicon-on-Insulator (SOI); high resistivity Si substrate; trap-rich layer; high frequency; wireless applications; LTE; SUBSTRATE; TECHNOLOGY;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The increasing demand for wireless data bandwidth and the rapid adoption of LTE and LTE Advanced standards push radio-frequency (RF) IC designers to develop devices with higher levels of integrated RF functions, meeting more and more stringent specification levels. The substrates on which those devices are manufactured play a major role in achieving that level of performance [1]. In this paper, UCL and Soitec explain the value of using RF-SOI substrates and more especially the new generation of Soitec widely adopted eSI (TM) (enhanced Signal Integrity) substrate to achieve the RF IC performance requested to address the LTE Advanced smart phone market.
引用
收藏
页码：33 / 36
页数：4
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