Spatiotemporal Graph and Hypergraph Partitioning Models for Sparse Matrix-Vector Multiplication on Many-Core Architectures

被引:7
|
作者
Abubaker, Nabil [1 ]
Akbudak, Kadir [2 ]
Aykanat, Cevdet [1 ]
机构
[1] Bilkent Univ, Dept Comp Engn, TR-06800 Ankara, Turkey
[2] King Abdullah Univ Sci & Technol, KSA, Extreme Comp Res Ctr, Dept Appl Math & Computat, Thuwal 23955, Saudi Arabia
关键词
Sparse matrix; sparse matrix-vector multiplication; data locality; spatial locality; temporal locality; hypergraph model; bipartite graph model; graph model; hypergraph partitioning; graph partitioning; Intel many integrated core architecture; Intel Xeon Phi; EXPLOITING LOCALITY; PERFORMANCE;
D O I
10.1109/TPDS.2018.2864729
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
There exist graph/hypergraph partitioning-based row/column reordering methods for encoding either spatial or temporal locality for sparse matrix-vector multiplication (SpMV) operations. Spatial and temporal hypergraph models in these methods are extended to encapsulate both spatial and temporal localities based on cut/uncut net categorization obtained from vertex partitioning. These extensions of spatial and temporal hypergraph models encode the spatial locality primarily and the temporal locality secondarily, and vice-versa, respectively. However, the literature lacks models that simultaneously encode both spatial and temporal localities utilizing only vertex partitioning for further improving the performance of SpMV on shared-memory architectures. In order to fill this gap, we propose a novel spatiotemporal hypergraph model that leads to a one-phase spatiotemporal reordering method which encodes both types of locality simultaneously. We also propose a framework for spatiotemporal methods which encodes both types of locality in two dependent phases and two separate phases. The validity of the proposed spatiotemporal models and methods are tested on a wide range of sparse matrices and the experiments are performed on both a 60-core Intel Xeon Phi processor and a Xeon processor. Results show the validity of the methods via almost doubling the Gflop/s performance through enhancing data locality in parallel SpMV operations.
引用
收藏
页码:445 / 458
页数:14
相关论文
共 50 条
  • [1] Adaptive Optimization of Sparse Matrix-Vector Multiplication on Emerging Many-Core Architectures
    Chen, Shizhao
    Fang, Jianbin
    Chen, Donglin
    Xu, Chuanfu
    Wang, Zheng
    IEEE 20TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING AND COMMUNICATIONS / IEEE 16TH INTERNATIONAL CONFERENCE ON SMART CITY / IEEE 4TH INTERNATIONAL CONFERENCE ON DATA SCIENCE AND SYSTEMS (HPCC/SMARTCITY/DSS), 2018, : 649 - 658
  • [2] Scale-Free Sparse Matrix-Vector Multiplication on Many-Core Architectures
    Liang, Yun
    Tang, Wai Teng
    Zhao, Ruizhe
    Lu, Mian
    Huynh Phung Huynh
    Goh, Rick Siow Mong
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2017, 36 (12) : 2106 - 2119
  • [3] Experiences with the Sparse Matrix-Vector Multiplication on a Many-core Processor
    Pichel, Juan C.
    Rivera, Francisco F.
    2012 IEEE 26TH INTERNATIONAL PARALLEL AND DISTRIBUTED PROCESSING SYMPOSIUM WORKSHOPS & PHD FORUM (IPDPSW), 2012, : 7 - 15
  • [4] Sparse Matrix-Vector Multiplication on a Map-Reduce Many-Core Accelerator
    Dragomir, Voichita
    Stefan, Gheorghe M.
    ROMANIAN JOURNAL OF INFORMATION SCIENCE AND TECHNOLOGY, 2020, 23 (03): : 262 - 273
  • [5] Sparse matrix-vector multiplication on the Single-Chip Cloud Computer many-core processor
    Pichel, Juan C.
    Rivera, Francisco F.
    JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING, 2013, 73 (12) : 1539 - 1550
  • [6] Locality-Aware Parallel Sparse Matrix-Vector and Matrix-Transpose-Vector Multiplication on Many-Core Processors
    Karsavuran, M. Ozan
    Akbudak, Kadir
    Aykanat, Cevdet
    IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2016, 27 (06) : 1713 - 1726
  • [7] Exploiting Locality in Sparse Matrix-Matrix Multiplication on Many-Core Architectures
    Akbudak, Kadir
    Aykanat, Cevdet
    IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2017, 28 (08) : 2258 - 2271
  • [8] Multithreaded sparse matrix-matrix multiplication for many-core and GPU architectures
    Deveci, Mehmet
    Trott, Christian
    Rajamanickam, Sivasankaran
    PARALLEL COMPUTING, 2018, 78 : 33 - 46
  • [9] Performance Analysis and Optimization of Sparse Matrix-Vector Multiplication on Modern Multi- and Many-Core Processors
    Elafrou, Athena
    Goumas, Georgios
    Koziris, Nectarios
    2017 46TH INTERNATIONAL CONFERENCE ON PARALLEL PROCESSING (ICPP), 2017, : 292 - 301
  • [10] Analysis of Partitioning Models and Metrics in Parallel Sparse Matrix-Vector Multiplication
    Kaya, Kamer
    Ucar, Bora
    Catalyuerek, Uemit V.
    PARALLEL PROCESSING AND APPLIED MATHEMATICS (PPAM 2013), PT II, 2014, 8385 : 174 - 184