共 50 条
- [1] Design and Implementation of VLSI for Finite State Entropy Encoding [J]. Jisuanji Fuzhu Sheji Yu Tuxingxue Xuebao/Journal of Computer-Aided Design and Computer Graphics, 2021, 33 (04): : 640 - 648
- [2] A VLSI interval router for high-speed networks [J]. 1996 CANADIAN CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING - CONFERENCE PROCEEDINGS, VOLS I AND II: THEME - GLIMPSE INTO THE 21ST CENTURY, 1996, : 154 - 157
- [3] VLSI design and implementation of a high-speed Viterbi decoder [J]. Jisuanji Yanjiu yu Fazhan/Computer Research and Development, 2007, 44 (12): : 2143 - 2148
- [4] High-speed VLSI implementation of IIR lattice filters [J]. THIRTIETH ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS & COMPUTERS, VOLS 1 AND 2, 1997, : 1057 - 1062
- [5] VLSI Implementation of High-speed SHA-256 [J]. 2009 IEEE 8TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2009, : 131 - +
- [6] VLSI design and implementation of high-speed Viterbi decoder [J]. 2002 INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CIRCUITS AND SYSTEMS AND WEST SINO EXPOSITION PROCEEDINGS, VOLS 1-4, 2002, : 64 - 68
- [7] VLSI implementation of high-speed cellular automata encryption algorithm [J]. CAS 2007 INTERNATIONAL SEMICONDUCTOR CONFERENCE, VOLS 1 AND 2, PROCEEDINGS, 2007, : 509 - 512
- [8] VLSI design and implementation of a high-speed multicast switch fabric [J]. 2006 23RD BIENNIAL SYMPOSIUM ON COMMUNICATIONS, 2006, : 356 - +
- [10] VLSI IMPLEMENTATION OF HIGH-SPEED 2-DIMENSIONAL STATE-SPACE RECURSIVE FILTERING [J]. 1989 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-3, 1989, : 1099 - 1102