Digital System Design Using Standard NeuMOS Cells Applied in ADAS

被引：0

作者：

Medina-Santiago, A. ^{[1
]}

Vera Molina, Patricia E. ^{[2
]}

Reyes Barranca, Mario Alfredo ^{[3
]}

Zepeda Hernandez, J. A. ^{[2
]}

机构：

[1] Ctr Res Dev & Technol Innovat UDescartes, Tuxtla Gutierrez, Chiapas, Mexico

[2] TNM, Inst Tecnol Tuxtla Gutierrez, Tuxtla Gutierrez, Chiapas, Mexico

[3] Inst Politecn Nacl, Ctr Invest & Estudios Avanzados, Tuxtla Gutierrez, Chiapas, Mexico

来源：

CIRCUITS SYSTEMS AND SIGNAL PROCESSING | 2020年 / 39卷 / 07期

关键词：

Floating-gate transistor; Software-hardware-logic (SHL); NeuMOS; Floating-gate potential diagram (FPD); Standard cells; Digital electronic systems; ADAS; LOGIC-CIRCUIT;

D O I：

10.1007/s00034-019-01325-5

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The design and implementation of digital systems with external configuration circuit-SHL (software-hardware-logic)-with standard cells based on floating-gate transistor (NeuMOS) and the implementation of the floating-gate potential diagram (FPD) to obtain Boolean functions are presented. External circuit configuration for designing digital systems of two and four bits reduces the number of transistors, as well as interconnection, and this can increase the speed of data processing; these results are helpful in growing applications like advanced driver assistance system (ADAS), where the number of sensors and processing time are increasing. Simulations results shown prove an effective reduction in transistor count, and a good performance of the system is demonstrated, as well.

引用

页码：3574 / 3594

页数：21

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