Cryogenic Characterization of 22-nm FDSOI CMOS Technology for Quantum Computing ICs

被引:79
|
作者
Bonen, S. [1 ]
Alakusu, U. [1 ]
Duan, Y. [1 ]
Gong, M. J. [1 ]
Dadash, M. S. [1 ]
Lucci, L. [2 ,3 ]
Daughton, D. R. [4 ]
Adam, G. C. [5 ,6 ]
Iordanescu, S. [5 ]
Pasteanu, M. [5 ]
Giangu, I. [5 ]
Jia, H. [7 ]
Gutierrez, L. E. [7 ]
Chen, W. T. [7 ]
Messaoudi, N. [8 ]
Harame, D. [2 ]
Mueller, A. [5 ]
Mansour, R. R. [7 ]
Asbeck, P. [9 ]
Voinigescu, S. P. [1 ]
机构
[1] Univ Toronto, Edward S Rogers Dept Elect & Comp Engn, Toronto, ON M5S 3G4, Canada
[2] GlobalFoundries Fab1 LLC & Co KG, D-01109 Dresden, Germany
[3] CEA Leti, MINATEC Campus 17, F-38054 Grenoble, France
[4] Lake Shore Cryotron Inc, Westerville, OH 43082 USA
[5] IMT Bucharest, Bucharest 077190, Romania
[6] George Washington Univ, Dept Elect & Comp Engn, Washington, DC 20052 USA
[7] Univ Waterloo, Dept Elect & Comp Engn, Waterloo, ON N2L 3G1, Canada
[8] Keysight Technol, Mississauga, ON L5N 2M2, Canada
[9] Univ Calif San Diego, Dept Elect & Comp Engn, La Jolla, CA 92093 USA
基金
加拿大自然科学与工程研究理事会;
关键词
cryogenics; millimeter waves; quantum computing; semiconductor quantum dots; silicon germanium; silicon-on-insulator;
D O I
10.1109/LED.2018.2880303
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An approach is proposed to realize largescale, "high-temperature" and high-fidelity quantum computing integrated circuits based on single-and multiple-coupled quantum-dot electron-and hole-spin qubits monolithically integrated with the mm-wave spin manipulation and readout circuitry in a commercial CMOS technology. Measurements of minimum-size 6 nm x 20 nm x 80 nm Si-channel n-MOSFETs (electron-spin qubit), SiGe-channel p-MOSFETs (hole-spin qubit), and double quantum-dot complementary qubits reveal strong quantum effects in the subthreshold region at 2 K, characteristic of resonant tunneling in a quantum dot. S-parameter measurements of a transimpedance amplifier (TIA) for spin readout show an improved performance from 300 K to 2 K. Finally, the qubit-with-TIA circuit has 50-Omega output impedance and 78-dB Omega transimpedance gain with a unity-gain bandwidth of 70 GHz and consumes 3.1 mW.
引用
收藏
页码:127 / 130
页数:4
相关论文
共 50 条
  • [21] Active Wideband 55-100-GHz Downconversion Mixer in 22-nm FDSOI CMOS
    Jokiniemi, Kimi
    Ryynanen, Kaisa
    Vaha, Joni
    Kankkunen, Elmo
    Stadius, Kari
    Ryynanen, Jussi
    2023 IEEE NORDIC CIRCUITS AND SYSTEMS CONFERENCE, NORCAS, 2023,
  • [22] Performance and Low-Frequency Noise of 22-nm FDSOI Down to 4.2 K for Cryogenic Applications
    Paz, Bruna Cardoso
    Casse, Mikael
    Theodorou, Christoforos
    Ghibaudo, Gerard
    Kammler, Thorsten
    Pirro, Luca
    Vinet, Maud
    de Franceschi, Silvano
    Meunier, Tristan
    Gaillard, Fred
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2020, 67 (11) : 4563 - 4567
  • [23] A 0.8-V, 2.88-GHz Double-Tail Latched Comparator in 22-nm FDSOI CMOS Technology
    Basavaraju, Harshitha
    Borggreve, David
    Boehme, Enno
    Vanselow, Frank
    Isa, Erkan Nevzat
    Maurer, Linus
    2021 IEEE NORDIC CIRCUITS AND SYSTEMS CONFERENCE (NORCAS), 2021,
  • [24] Ultra-Low Power 60 GHz Class-C Frequency Tripler in 22-nm FDSOI CMOS Technology
    Gupta, Aditya
    Dietz, Marco
    Engelmann, Andre
    Hagelauer, Amelie
    15TH IEEE LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS, LASCAS 2024, 2024, : 133 - 137
  • [25] A DC to 220-GHz High-Isolation SPST Switch in 22-nm FDSOI CMOS
    Wu, Lucy
    Hsu, Hao Yun
    Voinigescu, Sorin P.
    IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, 2021, 31 (06) : 775 - 778
  • [26] A Highly Linear D-Band Broadband Down Conversion Mixer in 22-nm FDSOI CMOS
    Balaban, Kaan
    Moeck, Matthias
    Ulusoy, Ahmet Cagri
    2023 IEEE 23RD TOPICAL MEETING ON SILICON MONOLITHIC INTEGRATED CIRCUITS IN RF SYSTEMS, 2023, : 1 - 3
  • [27] A Millimeter-Wave Concurrent LNA in 22-nm CMOS FDSOI for 5G Applications
    Fu, Jierui
    Bardeh, Mohammad Ghaedi
    Paramesh, Jeyanandh
    Entesari, Kamran
    IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2023, 71 (03) : 1031 - 1043
  • [28] A Cryogenic Voltage Regulator with Integrated Voltage Reference in 22 nm FDSOI Technology
    Cabrera-Galicia, A. R.
    Ashok, A.
    Vliex, P.
    Kruth, A.
    Zambanini, A.
    van Waasen, S.
    2023 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, APCCAS, 2024, : 304 - 308
  • [29] 55-100-GHz Enhanced Gilbert Cell Mixer Design in 22-nm FDSOI CMOS
    Jokiniemi, Kimi
    Ryynanen, Kaisa
    Vaha, Joni
    Kankkunen, Elmo
    Stadius, Kari
    Ryynanen, Jussi
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2024, 32 (12) : 2186 - 2197
  • [30] Compact Modelling of 22nm FDSOI CMOS Semiconductor Quantum Dot Cryogenic I-V Characteristics
    Tripathi, S. Pati
    Bonen, S.
    Nastase, C.
    Iordanescu, S.
    Boldeiu, G.
    Pasteanu, M.
    Muller, A.
    Voinigescu, S. P.
    IEEE 51ST EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE (ESSDERC 2021), 2021, : 43 - 46