共 50 条
- [21] Power estimation for architectural exploration of HW/SW communication on system-level buses PROCEEDINGS OF THE SEVENTH INTERNATIONAL WORKSHOP ON HARDWARE/SOFTWARE CODESIGN (CODES'99), 1999, : 152 - 156
- [23] Boundary Scan as a System-Level Diagnostic Tool 2012 IEEE AUTOTESTCON PROCEEDINGS, 2012, : 34 - 38
- [26] Unified System-Level Modeling of Intermittent Renewable Energy Sources and Energy Storage for Power System Operation IEEE SYSTEMS JOURNAL, 2012, 6 (01): : 140 - 151
- [27] SYSTEM-LEVEL POWER - CHOOSING THE RIGHT LEVEL OF INTEGRATION ELECTRONIC PRODUCTS MAGAZINE, 1995, 37 (10): : 53 - 54
- [28] System-level power: choosing the right level of integration Electronic Products (Garden City, New York), 1995, 37 (10): : 53 - 54
- [29] A Peak Current and Power Pad Count Reduction Tool for System-Level IC Designers ISCE: 2009 IEEE 13TH INTERNATIONAL SYMPOSIUM ON CONSUMER ELECTRONICS, VOLS 1 AND 2, 2009, : 405 - +
- [30] n A system-level power-estimation methodology based on IP-level modeling, power-level adjustment, and power accumulation ASP-DAC 2006: 11TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, PROCEEDINGS, 2006, : 547 - 550