DNN pruning and mapping on NoC-Based communication infrastructure

被引:15
|
作者
Mirmahaleh, Seyedeh Yasaman Hosseini [1 ]
Rahmani, Amir Masoud [1 ]
机构
[1] Islamic Azad Univ, Sci & Res Branch, Dept Comp Engn, Tehran, Iran
关键词
Deep neural network (DNN); Network on chip (NoC); DNN mapping; Dataflow mapping; Weight and neuron pruning (WNP);
D O I
10.1016/j.mejo.2019.104655
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Machine learning algorithm-based applications have been deployed for supporting the intemet of things (IoT) and web search engines without losing accuracy in order to satisfy human requests. Developments in deep learning-based applications and complexity of machine learning algorithms increase the depth of artificial neural networks (ANN). Increasing depth of neural network (NN) is challenging regarding the delay, energy consumption, learning, and inference speed up. We train a deep neural network (DNN) gradient descent-based method based on two Booth and Matyas standard generating functions. We also propose a method for pruning weights, neurons, and layers of DNNs based on minimal distance error before and after pruning in a range of safety margin error. This paper employs a new elastic dataflow and DNN mapping on the mesh topology for decreasing delay and energy consumption. Simulation results show reducing the delay and energy consumption of training and inference phases by approximately 22.56%-77% and 65.94%-88.54% compared with not employing a DNN pruning.
引用
收藏
页数:12
相关论文
共 50 条
  • [41] Mapping of Real-Time Applications on a Packet Switching NoC-based MPSoC
    Madalozzo, Guilherme
    Indrusiak, Leandro S.
    Moraes, Fernando G.
    23RD IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS CIRCUITS AND SYSTEMS (ICECS 2016), 2016, : 640 - 643
  • [42] Impact Analysis of Communication Overhead in NoC based DNN Hardware Accelerators
    Neethu, K.
    Russo, Enrico
    Kunthara, Rose George
    James, Rekha K.
    Jose, John
    2022 IEEE 19TH INDIA COUNCIL INTERNATIONAL CONFERENCE, INDICON, 2022,
  • [43] Effective Task Scheduling and IP Mapping Algorithm for Heterogeneous NoC-Based MPSoC
    Yang, Peng-Fei
    Wang, Quan
    MATHEMATICAL PROBLEMS IN ENGINEERING, 2014, 2014
  • [44] An Arbitrary Kernel-size Applicable NoC-based DNN Processor Design with Hybrid Data Reuse
    Chen, Kun-Chih
    Yang, Yueh-Chi
    Liao, Yi-Sheng
    2021 IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2021, : 657 - 660
  • [45] Adaptive Communication Mechanism for Accelerating MPI Functions in NoC-Based Multicore Processors
    Huang, Libo
    Wang, Zhiying
    Xiao, Nong
    Wang, Yongwen
    Dou, Qiang
    ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2013, 10 (03)
  • [46] NoC-based FPGA: Architecture and routing
    Gindin, Roman
    Cidon, Israel
    Keidar, Idit
    NOCS 2007: FIRST INTERNATIONAL SYMPOSIUM ON NETWORKS-ON-CHIP, PROCEEDINGS, 2007, : 253 - +
  • [47] Partitioning and Dynamic Mapping Evaluation for Energy Consumption Minimization on NoC-Based MPSoC
    Antunes, Eduardo
    Soares, Matheus
    Aguiar, Alexandra
    Johann, Sergio F.
    Sartori, Marcos
    Hessel, Fabiano
    Marcon, Cesar
    2012 13TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED), 2012, : 451 - 457
  • [48] An energy-aware online task mapping algorithm in NoC-based system
    Xie, Bin
    Chen, Tianzhou
    Hu, Wei
    Tang, Xingsheng
    Wang, Dazhou
    JOURNAL OF SUPERCOMPUTING, 2013, 64 (03): : 1021 - 1037
  • [49] NOVA: NoC-based Vector Unit for Mapping Attention Layers on a CNN Accelerator
    Upadhyay, Mohit
    Juneja, Rohan
    Wong, Weng-Fai
    Peh, Li-Shivan
    2024 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION, DATE, 2024,
  • [50] Communication Modelling and Synthesis for NoC-based Systems with Real-time Constraints
    Tagel, Mihkel
    Ellervee, Peeter
    Hollstein, Thomas
    Jervan, Gert
    2011 IEEE 14TH INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS (DDECS), 2011, : 237 - 242