WAFER 3D EFFECT STUDY WITH FINITE DIFFERENCE TIME DOMAIN (FDTD) SIMULATION METHOD

As the technology reaches the 2x nm node in semiconductor manufacture, wafer 3-dimensional topography proximity effects ( W3D) becomes more and more challenging during lithography process, especially for the implantation layers. This effect is caused by the light reflection from the substrate during wafer-exposure process, which can cause the line width shrinkage of the photoresist and patterning failure. This paper presents a study of W3D effect with a series of typical substrate designs. This study provides both on-wafer data and simulation data with finite difference in time domain ( FDTD) method. From the study, we have found that there exists a trend of linewidth shrinkage as the reflection from the substrate become more and more enhanced due to its size enlarged. The simulation result in our experiment can present a similar trend to the on-wafer result with a picture describing the wave propagation of W3D effect.