Custom hardware implementation of the Finite-Difference Time-Domain (FDTD) method

被引:3
|
作者
Schneider, RN [1 ]
Okoniewski, MM [1 ]
Turner, LE [1 ]
机构
[1] Univ Calgary, Calgary, AB T2N 1N4, Canada
关键词
D O I
10.1109/MWSYM.2002.1011769
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Finite-Difference Time-Domain (FDTD) Analysis is a very popular method for solving electromagnetic problems. The algorithm Is computationally intensive and simulations can take several days to run on traditional, multiprocessor supercomputer platforms. Reducing the runtime of these simulations, by an order of magnitude or more, would greatly Increase the productivity of FDTD users and open new avenues of research. A hardware implementation of a one-dimensional FDTD computational cell is presented, with the goal of accelerating three-dimensional computations by a factor of 10-100 times. A free-space, cavity resonator is used to successfully verify the FDTD simulation on hardware. Computational speed is very promising and is independent of the number of cells in the simulation. Larger simulations require more hardware. A typical simulation size (100x100x100) is hardware prohibitive, so future work will investigate hardware sharing methods.
引用
收藏
页码:875 / 878
页数:4
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