Design and control of critical properties of low-k dielectrics for nanoscale interconnects

被引：0

作者：

Zhou, H ^{[1
]}

Shi, FG ^{[1
]}

Zhao, B ^{[1
]}

机构：

[1] Univ Calif Irvine, Henry Samueli Sch Engn, Irvine, CA 92697 USA

来源：

2004: 7TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUITS TECHNOLOGY, VOLS 1- 3, PROCEEDINGS | 2004年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

As integrated circuits (IC) evolve to the generations of nanometer-scale feature size, the thermal, electrical, mechanical and structural properties of the materials used for IC can be very different from those at micrometer or sub-micrometer scale. These changes have very dramatic impacts on the design and fabrication of future high performance IC. This paper presents how thermal, dielectric, and electrical properties of low dielectric constant (low-k) materials change as the interconnect dielectric layer is scaled down to the inn range. The study is focused on carbon-doped PECVD silicon oxide, a widely used low-k material in IC manufacturing.

引用

页码：497 / 502

页数：6

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