Low voltage analog multipliers based on CMOS inverters

被引：0
|
作者：
Machowsi, W. [1 ]
Jasielski, J. [3 ,4 ]
Kolodziejski, W. [2 ]
Kuta, S. [3 ,4 ]
机构：
[1] AGH Univ Sci & Technol, Dept Elect, Krakow, Poland
[2] Higher Vocat Sch, Technol Dept, Tarnow, Poland
[3] AGH Univ Sci & Technol, Krakow, Poland
[4] HVS Tarnow, Tarnow, Poland
来源：
MIXDES 2008: PROCEEDINGS OF THE 15TH INTERNATIONAL CONFERENCE ON MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | 2008年
关键词：
analog circuits; multiplier; CMOS; low voltage;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In the paper we consider two examples of analog multipliers suitable for low votage CMOS technology. The second of the circuits presented is an example of newly proposed class of the analog CMOS circuits based on inverters with modified differential steering - separate for N- and P-transistor. This leads to very low supply voltage requirements - thus the necessary supply voltage only slightly exceeds single threshold voltage. Simulation results as well as experimental data for one implementation are presented.
引用
收藏
页码：267 / +
页数：2
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