Analytical modeling on the drain current characteristics of gate-all-around TFET with the incorporation of short-channel effects

被引：3

作者：

Xu, Wanjie ^{[1
]}

Wong, Hei ^{[1
]}

Iwai, Hiroshi ^{[2
]}

Liu, Jun ^{[1
]}

Qin, Pei ^{[1
]}

机构：

[1] City Univ Hong Kong, Dept Elect Engn, Tat Chee Ave, Kowloon, Hong Kong, Peoples R China

[2] Tokyo Inst Technol, Frontier Res Ctr, Yokohama, Kanagawa 2268502, Japan

来源：

SOLID-STATE ELECTRONICS | 2017年 / 138卷

关键词：

FIELD-EFFECT TRANSISTORS; TUNNEL-FETS; MOSFETS;

D O I：

10.1016/j.sse.2017.07.004

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An analytical model for describing the drain current characteristics of gate-all-around (GAA) tunneling field-effect transistor (TFET) is developed. Starting from potential distribution derived from Poisson's equation in different regions along the channel, drain current model is developed based on Kane's approach. The new model shows a better accuracy than the previously reported models. It is valid for larger ranges of bias conditions and channel length also. In particular, we have taken the effect of drain bias on the source junction tunneling into account. This effect is quite significant for the subthreshold conduction of short-channel devices. The validity of this model has been confirmed with TCAD simulation. (C) 2017 Elsevier Ltd. All rights reserved.

引用

页码：24 / 29

页数：6

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