A pre-filter based PLL for three-phase grid connected applications

被引:26
|
作者
Sinha, Rakesh Kumar [2 ]
Sensarma, Parthasarathi [1 ]
机构
[1] Indian Inst Technol, Dept Elect Engn, Kanpur 208016, Uttar Pradesh, India
[2] Tata Motors, Engn Res Ctr, Lucknow 227105, Uttar Pradesh, India
关键词
Phase locked loop (PLL); Synchronous reference frame (SRF); Grid connected applications; Phase estimation; Frequency measurement; PHASE-LOCKED LOOP; POWER-GENERATION SYSTEMS; SYNCHRONIZATION; CONVERTERS; FREQUENCY;
D O I
10.1016/j.epsr.2010.07.020
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper proposes a phase estimator based on a pre-filter based phase locked loop (PF-PLL), which overcomes serious limitations of existing PLL routines under frequency variation, distorted power grid conditions and measurement errors. This is achieved by a chain of pre-filters, which systematically attenuates all distortion components and extracts the fundamental, positive-sequence signal. The reported PF-PLL is capable of fast and precise phase estimation, even with unbalanced and highly distorted threephase electrical variables, which may be measured with low-cost transducers of reduced accuracy. Consequently, it is appropriate for control of all grid connected equipment, including the dynamic voltage restorer (DVR), where it is often required to synchronize with line currents, which experience much higher levels of harmonic distortion than voltages. This paper presents a detailed analysis of the PF-PLL, its evaluation through simulation and experiments, using a fixed-point DSP based laboratory prototype. (C) 2010 Elsevier B.V. All rights reserved.
引用
收藏
页码:129 / 137
页数:9
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