Unified fully-pipelined VLSI implementations of two-dimensional discrete trigonometric transforms

被引：1

作者：

Shie, MC ^{[1
]}

Fang, WH ^{[1
]}

Wu, ML ^{[1
]}

Lai, FP ^{[1
]}

机构：

[1] Natl Taiwan Univ, Dept Elect Engn, Taipei 10764, Taiwan

来源：

APCCAS '98 - IEEE ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS: MICROELECTRONICS AND INTEGRATING SYSTEMS | 1998年

关键词：

D O I：

10.1109/APCCAS.1998.743897

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper describes a unified VLSI architecture which can efficiently realize some popular two-dimensional discrete trigonometric transforms (2-D DTT). The computation of the 2-D DTT is based on the row-column decomposition approach. However, in contrast to previous schemes, efficient and unrestricted Clenshaw's recurrence formula along with the inherent symmetry of the trigonometric functions are adequately employed to render efficient recurrences for computing both of the row and column transforms. As such, the resulting VLSI architecture not only provides substantial hardware savings as compared with previous works, but it can also be applied to the 2-D DTT-of arbitrary size. An input buffer along with a bidirectional circular shift matrix are addressed as well to enable the architecture to operate in a fully-pipelined manner.

引用

页码：623 / 626

页数：4

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