Defeating Simple Power Analysis Attacks in Cache Memories

被引：0

作者：

Neagu, Madalin ^{[1
]}

Miclea, Liviu ^{[1
]}

Manich, Salvador ^{[2
]}

机构：

[1] Tech Univ Cluj Napoca, Cluj Napoca, Romania

[2] Univ Politecn Catalunya BarcelonaTech, Dept Elect Engn, Barcelona, Spain

来源：

2015 CONFERENCE ON DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS (DCIS) | 2015年

关键词：

Data scrambling; cache memories; cold-boot attack; self-healing memories; simple power analysis; side channel attack;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A wide range of attacks that target cache memories in secure systems have been reported in the last half decade. Cold-boot attacks can be thwarted through the recently proposed Interleaved Scrambling Technique (IST). However, side channel attacks like the Simple Power Analysis (SPA) can still circumvent this protection. Error detection and correction codes (EDC/ECC) are employed in memories to increase reliability, but they can also be used to increase the security. This paper proposes to boost the IST with an ECC code in order to create a cache resistant against SPA-attacks. The redundancy provided by the ECC code is used to create confusion by enlarging the search space where the hacker has to look for to find the secret keys.

引用

页数：6

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