A novel vertical bottom-gate polysilicon thin film transistor with self-aligned offset

被引：0

作者：

Lai, CS ^{[1
]}

Lee, CL ^{[1
]}

Lei, TF ^{[1
]}

Chern, HN ^{[1
]}

机构：

[1] NATL CHIAO TUNG UNIV,INST ELECTR,HSINCHU 30039,TAIWAN

来源：

IEEE ELECTRON DEVICE LETTERS | 1996年 / 17卷 / 05期

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A novel device structure for the vertical bottom polysilicon gate thin film transistor (TFT) with a self-align offset drain is proposed and demonstrated, The new VTFT allows a deep-submicron channel length, which is determined by the thickness of the active polysilicon film, not by the lithographic system resolution, The self-alignment offset drain reduces the leakage current, as a result, it exhibits good device performance.

引用

页码：199 / 201

页数：3

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