A high voltage CMOS ADSL line driver

被引：2
|
作者：
Ghosh, KK [1 ]
Salama, CAT [1 ]
机构：
[1] Univ Toronto, Edward S Rogers Sr Dept Elect & Comp Engn, Toronto, ON M5S 3G4, Canada
来源：
ISPSD'03: 2003 IEEE 15TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES AND ICS PROCEEDINGS | 2003年
关键词：
D O I：
10.1109/ISPSD.2003.1225241
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper reports the successful design and implementation of a high voltage ADSL line driver in a conventional submicron CMOS process. The line driver features a total area of 0.2 mm(2), an output impedance of 0.09 Omega and a bandwidth of 3.4 MHz. It can be integrated into a short loop Subscriber Line Interface Circuit (SLIC), supporting ADSL Full Rate applications.
引用
收藏
页码：105 / 108
页数：4
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