A High-Performance SiC Super-Junction MOSFET With a Step-Doping Profile

被引：7

作者：

Huang, Hao ^{[1
]}

Wang, Ying ^{[1
]}

Yu, Cheng-Hao ^{[1
]}

Tang, Zhao-Huan ^{[2
]}

Li, Xing-Ji ^{[3
]}

Yang, Jian-Qun ^{[3
]}

Cao, Fei ^{[1
]}

机构：

[1] Hangzhou Dianzi Univ, Key Lab RF Circuits & Syst, Minist Educ, Hangzhou 310018, Peoples R China

[2] China Elect Technol Grp Corp, Natl Key Lab Analog Integrated Circuits, Chongqin 400060, Peoples R China

[3] Harbin Inst Technol, Natl Key Lab Mat Behav & Evaluat Technol Space En, Harbin 150080, Peoples R China

来源：

IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY | 2021年 / 9卷

基金：

中国国家自然科学基金;

关键词：

Silicon carbide; Electric fields; MOSFET; Semiconductor process modeling; Performance evaluation; Logic gates; JFETs; SiC MOSFET; breakdown voltage; specific on-resistance; figure of merit; SINGLE-EVENT BURNOUT; IMPACT IONIZATION COEFFICIENTS; POWER; MOBILITY; DIODES; LAYERS; 6H;

D O I：

10.1109/JEDS.2021.3125706

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this article, we investigate a 4H-SiC super- junction (SJ) MOSFET structure with a charge-imbalance doping-profile. According to our numerical simulations and comparisons with the conventional SiC VDMOS (C-VDMOS) and SiC SJ VDMOS (SJ-VDMOS) devices, the SJ-MOD structure offers a better trade-off between breakdown voltage (BV) and specific on-resistance (R-on,R-sp). This leads to a high figure of merit (FOM=BV2/R-on,R-sp). In addition, due to the reduced electric field peak, the single-event burnout (SEB) of the device is significantly improved. The simulation results indicate that, using a LET value of 0.1 pC/mu m and a 3000K global device temperature as the criterion for burning, the specific burnout-threshold voltage (using the optimal parameters of the proposed structure) exceeds that of the conventional structure. This indicates that the modified super-junction structure can indeed be used for different voltage-classes of the hardening SiC super-junction devices in the future.

引用

页码：1084 / 1092

页数：9

共 50 条

[31] Improved 4H-SiC UMOSFET with super-junction shield region
沈培
王颖
李兴冀
杨剑群
于成浩
曹菲
ChinesePhysicsB, 2021, 30 (05) : 729 - 735
[32] 4H-SiC Super-Junction JFET: Design and Experimental Demonstration
Wang, Hengyu
Wang, Ce
Wang, Baozhu
Ren, Na
Sheng, Kuang
IEEE ELECTRON DEVICE LETTERS, 2020, 41 (03) : 445 - 448
[33] Improved 4H-SiC UMOSFET with super-junction shield region
Shen, Pei
Wang, Ying
Li, Xing-Ji
Yang, Jian-Qun
Yu, Cheng-Hao
Cao, Fei
CHINESE PHYSICS B, 2021, 30 (05)
[34] Development of SiC super-junction (SJ) devices by multi-epitaxial growth
Kosugi, Ryoji
Sakuma, Yuuki
Kojima, Kazutoshi
Itoh, Sachiko
Nagata, Akiyo
Yatsuo, Tsutomu
Tanaka, Yasunori
Okumura, Hajime
SILICON CARBIDE AND RELATED MATERIALS 2013, PTS 1 AND 2, 2014, 778-780 : 845 - +
[35] Analysis and fabrication of a SiC super-junction termination structure in a state of charge imbalance
Haobo KANG
Fengyu DU
Hao YUAN
Boyi BAI
Yu ZHOU
Jingyu LI
Chao HAN
Xiaoyan TANG
Qingwen SONG
Yuming ZHANG
Science China(Information Sciences), 2025, 68 (04) : 401 - 402
[36] SiC Super Junction Transistors deliver high temp performance
Veereddy, Deepak
Power Electronics Technology, 2011, 37 (11):
[37] A Super-Junction MOSFET-based 99%+ Efficiency T-Type Multilevel Converter
McNeill, Neville
Yuan, Xibo
Jin, Bosen
2018 IEEE ENERGY CONVERSION CONGRESS AND EXPOSITION (ECCE), 2018, : 5643 - 5650
[38] Design of 100-V Super-Junction Trench Power MOSFET with Low On-Resistance
Lho, Young Hwan
Yang, Yil-Suk
ETRI JOURNAL, 2012, 34 (01) : 134 - 137
[39] Modeling and optimal device design for 4H-SiC super-junction devices
Yu, Liangchun
Sheng, Kuang
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2008, 55 (08) : 1961 - 1969
[40] A 650 V Super-Junction MOSFET With Novel Hexagonal Structure for Superior Static Performance and High BV Resilience to Charge Imbalance: A TCAD Simulation Study
Park, Jaehoon
Lee, Jong-Ho
IEEE ELECTRON DEVICE LETTERS, 2017, 38 (01) : 111 - 114

← 1 2 3 4 5 →