Design and Demonstration of an 8-bit Bit-Serial RSFQ Microprocessor: CORE e4

被引：63

作者：

Ando, Yuki ^{[1
]}

Sato, Ryo ^{[2
]}

Tanaka, Masamitsu ^{[2
]}

Takagi, Kazuyoshi ^{[1
]}

Takagi, Naofumi ^{[1
]}

Fujimaki, Akira ^{[2
]}

机构：

[1] Kyoto Univ, Grad Sch Informat, Kyoto 6068501, Japan

[2] Nagoya Univ, Dept Quantum Engn, Nagoya, Aichi 4648601, Japan

来源：

IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY | 2016年 / 26卷 / 05期

基金：

日本科学技术振兴机构;

关键词：

Arithmetic logic unit (ALU); microprocessor; rapid single flux quantum (RSFQ); superconducting integrated circuits; COMPONENT TEST; CIRCUITS;

D O I：

10.1109/TASC.2016.2565609

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We present a design of an 8-bit bit-serial rapid single-flux- quantum (RSFQ) microprocessor, which is called CORE e4, and its high-speed functionality test results. The CORE e4 is equipped with four general-purpose registers and can execute 20 different instructions. The first version of the CORE e4, which is called CORE e4v1, has been implemented using the National Institute of Advanced Industrial Science and Technology (AIST) 10-kA/cm(2) advanced process (ADP2) and the CONNECT cell library. The CORE e4v1 consists of approximately 7000 Josephson junctions and occupies a circuit area of 3.00 mm x 1.98 mm. The estimated power consumption and performance are 2.03 mW and 333 million instructions per second, respectively. CORE e4 is one of the highest performing RSFQ microprocessors.

引用

页数：5

共 50 条

[21] 8088: An 8-bit Version of the 8086 Microprocessor.
Roublot, R.
[J]. Electronique Industrielle (Paris), 1980, (07): : 45 - 46
[22] INTERFACING AN EE-PROM WITH AN 8-BIT MICROPROCESSOR
FANSLER, DV
[J]. ELECTRONICS, 1983, 56 (23): : 130 - 131
[23] C2MOS 8-BIT MICROPROCESSOR
SUZUKI, Y
SAEKI, Y
TAKATA, M
SATO, Y
KUNIEDA, M
TAKIZAWA, S
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1981, 16 (05) : 599 - 601
[24] An 8-bit Bit-Slice TEA-Cryptographic Accelerator for 64-bit RSFQ Secure Coprocessors
Yu, Pei-Shi
Tang, Guang-Ming
Ye, Xiao-Chun
Fan, Dong-Rui
Zhang, Zhi-Min
Sun, Ning-Hui
[J]. 2019 IEEE INTERNATIONAL SUPERCONDUCTIVE ELECTRONICS CONFERENCE (ISEC), 2019,
[25] BIT-SERIAL VLSI IMPLEMENTATION FOR AN OPTIMIZED TRANSMULTIPLEXER DESIGN
CATTHOOR, F
DEMAN, H
VANDEWALLE, J
[J]. INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 1987, 15 (03) : 281 - 303
[26] Design and simulation of an 8-bit computer
Choi, CH
[J]. 1997 INTERNATIONAL CONFERENCE ON SIMULATION IN ENGINEERING EDUCATION (ICSEE'97), 1997, 29 (02): : 225 - 230
[27] 4-BIT MICRO ADAPTS TO 8-BIT WORLD
NIEWIERSKI, WJ
[J]. COMPUTER DESIGN, 1981, 20 (10): : 186 - 186
[28] AN 8-BIT MULTITASK MICROPOWER RISC CORE
PEROTTO, JF
LAMOTHE, C
ARM, C
PIGUET, C
DIJKSTRA, E
FINK, S
SANCHEZ, E
WATTENHOFER, JP
CECCHINI, M
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1994, 29 (08) : 986 - 991
[29] TOSHIBA 8-BIT/4-BIT MICROCOMPUTER.
Namimoto, Keiji
Ozawa, Yukio
Suzuki, Seigo
[J]. American Chemical Society, Polymer Preprints, Division of Polymer Chemistry, 1979, (122): : 38 - 42
[30] COMPRESSING 8-BIT DATA INTO 4-BIT RANGE
BAINES, T
[J]. ELECTRONIC ENGINEERING, 1983, 55 (673): : 25 - 26

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