Efficient RNS to binary converters for the new 4-moduli set {2n, 2n+1-1, 2n-1, 2n-1-1}

被引：2

作者：

Esmaeildoust, Mohammad ^{[1
]}

Navi, Keivan ^{[1
]}

Taheri, MohammadReza ^{[2
]}

Molahosseini, Amir Sabbagh ^{[3
]}

Khodambashi, Siavash ^{[1
]}

机构：

[1] Shahid Beheshti Univ, Fac Elect & Comp Engn, Tehran, Iran

[2] Islamic Azad Univ, Dept Comp Engn, Sci & Res Branch, Tehran, Iran

[3] Islamic Azad Univ, Dept Comp Engn, Kerman Branch, Kerman, Iran

来源：

IEICE ELECTRONICS EXPRESS | 2012年 / 9卷 / 01期

关键词：

computer arithmetic; residue number system (RNS); RNS to binary (reverse) converter; moduli sets;

D O I：

10.1587/elex.9.1

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, we propose efficient designs of residue number system (RNS) to binary converter for the balanced moduli set {2(n), 2(n+1) - 1, 2(n) - 1, 2(n-1) - 1} where n has even values. This new moduli set is completely free from modulo-(2(k) + 1)-type which results in high-speed modulo arithmetic channels for RNS. Also, mixed-radix conversion (MRC) algorithm is used to achieve both an arithmetic-based and reduced-complexity two-level RNS to binary converter architectures. The proposed moduli set provides fast arithmetic operation with higher speed of the reverse converter comparing to other five moduli set which is found in literature.

引用

页码：1 / 7

页数：7

共 50 条

[1] New efficient residue-to-binary converters for 4-moduli set {2n-1, 2n, 2n+1, 2n+1-1}
Cao, B
Chang, CH
Srikanthan, T
PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL IV: DIGITAL SIGNAL PROCESSING-COMPUTER AIDED NETWORK DESIGN-ADVANCED TECHNOLOGY, 2003, : 536 - 539
[2] Memoryless RNS-to-Binary Converters for the {2n+1-1, 2n, 2n-1} Moduli Set
Gbolagade, Kazeem Alagbe
Voicu, George Razvan
Cotofana, Sorin Dan
21ST IEEE INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS, 2010,
[3] Reverse Converters for the Moduli Set {{2n, 2n-1-1, 2n-1, 2n+1-1}( n Even)
Mohan, P. V. Ananda
CIRCUITS SYSTEMS AND SIGNAL PROCESSING, 2018, 37 (08) : 3605 - 3634
[4] Efficient reverse converters for four-moduli sets {2n-1, 2n, 2n+1, 2n+1-1} and {2n-1, 2n, 2n+1, 2n-1-1}
Cao, B
Srikanthan, T
Chang, CH
IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, 2005, 152 (05): : 687 - 696
[5] RNS-to-binary converter for a new three-moduli set {2n+1-1, 2n, 2n-1}
Mohan, Pernmaraju V. Ananda
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2007, 54 (09) : 775 - 779
[6] Efficient two-level reverse converters for the four-moduli set {2n-1, 2n-1, 2n-1-1, 2n+1-1}
Obeidi Daghlavi, Mohammad
Noorimehr, Mohammad Reza
Esmaeildoust, Mohammad
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2021, 108 (01) : 75 - 87
[7] RNS-to-Binary Converter for New Four-Moduli Set {2n-1, 2n, 2n+1-1, 2n+1+2n-1}
Quan Si
Pan Weitao
Xie Yuanbin
Hao Yue
CHINESE JOURNAL OF ELECTRONICS, 2012, 21 (03): : 430 - 434
[8] Fast Sign Detection Algorithm for the RNS Moduli Set {2n+1-1, 2n-1, 2n}
Xu, Minghe
Bian, Zhenpeng
Yao, Ruohe
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2015, 23 (02) : 379 - 383
[9] A memoryless reverse converter for the 4-moduli superset {2n-1, 2n, 2n+1, 2n+1-1}
Vinod, AP
Premkumar, AB
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2000, 10 (1-2) : 85 - 99
[10] RNS Smith-Waterman Accelerator based on the moduli set 2n, 2n-1, 2n-1-1
Mensah, Patrick Kwabena
Bankas, Edem K.
Iddrisu, Mohammed Muniru
2018 IEEE 7TH INTERNATIONAL CONFERENCE ON ADAPTIVE SCIENCE & TECHNOLOGY (IEEE ICAST), 2018,

← 1 2 3 4 5 →