Floating-gate CMOS analog memory cell array

被引:0
|
作者
Harrison, RR [1 ]
Hasler, P [1 ]
Minch, BA [1 ]
机构
[1] CALTECH, Computat & Neural Syst Program 13974, Pasadena, CA 91125 USA
关键词
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
The complexity of analog VLSI systems is often limited by the number of pins on a chip rather than by the die area. Currently, many analog parameters and biases are stored off chip. Moving parameter storage on chip could save pins and allow us to create complex programmable analog systems. In this paper, we present a design for an on-chip non-volatile analog memory cell that can be configured in addressable arrays and programmed easily. We use floating-gate MOS transistors to store charge, and we use the processes of tunneling and hot-electron injection to program values. We achieve greater than 13-bit precision with no crosstalk between memory cells.
引用
收藏
页码:A204 / A207
页数:4
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