Chip-Level High-Frequency EMC Strategies and Measurement Techniques

被引:0
|
作者
Chang, Yin-Cheng [1 ]
Wang, Ping-Yi [1 ]
Line, Ta-Yeh [2 ]
Hsieh, Chao-Ping [2 ]
Change, Da-Chiang [2 ]
Hsu, Shawn S. H. [1 ]
机构
[1] Natl Tsing Hua Univ, Inst Elect Engn, Hsinchu, Taiwan
[2] Taiwan Semicond Res Inst, Natl Appl Res Labs, Hsinchu, Taiwan
关键词
electromagnetic interference (EMI); electromagnetic susceptibility (EMS); IC-electromagnetic compatibility (IC-EMC); measurement; on-chip;
D O I
10.1109/RFIT54256.2022.9882454
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents different electromagnetic compatibility (EMC) strategies for achieving low EM emission and high immunity. The proposed designs and measurement techniques for improving and evaluating the chip level EM interference (EMI) and EM susceptibility (EMS) are included to provide high-frequency EMC solutions. This paper also gives a comprehensive overview for the researchers to continue working on the EMC-related topics and issues at the chip level at high frequencies.
引用
收藏
页码:137 / 139
页数:3
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