Boundary Scan Security Enhancements for a Cryptographic Hardware

被引：0
|
作者：
Nikodem, Maciej [1 ]
机构：
[1] Wroclaw Univ Technol, Inst Comp Engn Control & Robot, PL-50370 Wroclaw, Poland
来源：
COMPUTER AIDED SYSTEMS THEORY - EUROCAST 2009 | 2009年 / 5717卷
关键词：
boundary scan; IEEE; 1149; side-channel attacks; counter-measures;
D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
Boundary scan (JTAG) is a powerful testing scheme that is widely used in nowadays circuits to maintain and verify operation of the hardware. However, JTAG is not used in cryptographic hardware since it, may be used to compromise security of the implemented cryptographic algorithm. This paper analyses different solutions proposed to overcome the threat of such attacks, presents requirements that have to be satisfied in order to construct effective security solution, and presents novel proposal that improves security of the boundary scan.
引用
收藏
页码：91 / 97
页数：7
相关论文
共 50 条
  • [21] Flexible High Performance Architecture For Boundary Scan Execution Hardware
    Borroz, Terry
    [J]. 2015 IEEE AUTOTESTCON, 2015, : 232 - 235
  • [22] Testability of Cryptographic Hardware and Detection of Hardware Trojans
    Mukhopadhyay, Debdeep
    Chakraborty, Rajat Subhra
    [J]. 2011 20TH ASIAN TEST SYMPOSIUM (ATS), 2011, : 517 - 524
  • [23] Testability of cryptographic hardware and detection of Hardware Trojans
    Mukhopadhyay, Debdeep
    Chakraborty, Rajat Subhra
    [J]. Proceedings of the Asian Test Symposium, 2011, : 517 - 524
  • [24] Implementation and characterization of flash-based hardware security primitives for cryptographic key generation
    Oh, Mi-Kyung
    Lee, Sangjae
    Kang, Yousung
    Choi, Dooho
    [J]. ETRI JOURNAL, 2023, 45 (02) : 346 - 357
  • [25] Asynchronous cryptographic hardware design
    Teifel, John
    [J]. 2006: 40th Annual IEEE International Carnahan Conferences Security Technology, Proceedings, 2006, : 221 - 227
  • [26] Hardware Design of Cryptographic Accelerator
    Hulic, Michal
    Vokorokos, Liberios
    Adam, Norbert
    Fecil'ak, Peter
    [J]. 2018 IEEE 16TH WORLD SYMPOSIUM ON APPLIED MACHINE INTELLIGENCE AND INFORMATICS (SAMI 2018): DEDICATED TO THE MEMORY OF PIONEER OF ROBOTICS ANTAL (TONY) K. BEJCZY, 2018, : 201 - 206
  • [27] Boundary-scan technology and its application in hardware experiment system
    Han, XR
    Xiao, TJ
    Zhao, H
    [J]. ICEMI 2005: Conference Proceedings of the Seventh International Conference on Electronic Measurement & Instruments, Vol 3, 2005, : 228 - 231
  • [28] Using General Purpose Digital Hardware To Perform Boundary Scan Tests
    Borroz, Terry
    [J]. IEEE AUTOTESTCON 2011: SYSTEMS READINESS TECHNOLOGY CONFERENCE, 2011, : 328 - 332
  • [29] A Formal Approach to Identifying Hardware Trojans in Cryptographic Hardware
    Ito, Akira
    Ueno, Rei
    Homma, Naofumi
    [J]. 2021 IEEE 51ST INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC (ISMVL 2021), 2021, : 154 - 159
  • [30] The Security of Cryptographic Hashes
    Teat, Chad
    Peltsverger, Svetlana
    [J]. PROCEEDINGS OF THE 49TH ANNUAL ASSOCIATION FOR COMPUTING MACHINERY SOUTHEAST CONFERENCE (ACMSE '11), 2011, : 103 - 108
12345