Bit-line Sense Amplifier Using PMOS Charge Transfer Pre-amplifier for Low-Voltage DRAM

A bit-line sense amplifier using PMOS charge transfer pre-sensing (CTPS) circuit is proposed. The CTPS circuit using charge sharing operation between lines which have different capacitance is useful for increasing small bit-line voltage differences. The PMOS latch transistors of CTPS circuit are used for pre-sensing operation and pull-up latching operation. Because the PMOS latch transistors are used mutually, area overhead of the CTPS is minimized. The PMOS CTPS circuit increases the small bit-line voltage difference and the output voltage difference of the CTPS circuit becomes the input voltage difference of the latch sense amplifier. Using the PMOS CTPS circuit, the speed of read operation and the reliability of the read operation is improved. The performance of the proposed scheme is verified by the simulation using a 45 nm process.