Design of a 0.5 V op-amp based on CMOS inverter using floating voltage sources

被引：7

作者：

Wang, Jun ^{[1
]}

Lee, Tuck-Yang ^{[1
]}

Kim, Dong-Gyou ^{[1
]}

Matsuoka, Toshimasa ^{[1
]}

Taniguchi, Kenji ^{[1
]}

机构：

[1] Osaka Univ, Suita, Osaka 5650871, Japan

来源：

IEICE TRANSACTIONS ON ELECTRONICS | 2008年 / E91C卷 / 08期

关键词：

operational amplifier; CMOS inverter; floating voltage source; forward body bias;

D O I：

10.1093/ietele/e91-c.8.1375

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This letter presents a 0.5 V low-voltage op-amp in a standard 0.18 mu m CMOS process for switched-capacitor circuits. Unlike other two-stage 0.5 V op-amp architectures, this op-amp consists of CMOS inverters that utilize floating voltage sources and forward body bias for obtaining high-speed operation. And two improved common-mode rejection circuits are well combined to achieve low power and chip area reduction. Simulation results indicate that the op-amp has an open-loop gain of 62 dB, and a high unity gain bandwidth of 56 MHz. The power consumption is only 350 mu W.

引用

页码：1375 / 1378

页数：4

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