High-level Synthesis-based Signal Coding

被引：0

作者：

Dossis, Michael ^{[1
]}

Androulidakis, Iosif ^{[2
]}

机构：

[1] TEI Western Macedonia, Dept Informat Engn, Kastoria, Greece

[2] Univ Ioannina, Ioannina, Greece

来源：

2016 INTERNATIONAL CONFERENCE ON INFORMATION AND DIGITAL TECHNOLOGIES (IDT) | 2016年

关键词：

High-level Synthesis; Signal Coding; Low level Design; EDA; formal verification; simulation; DESIGN; EXPLORATION;

D O I：

暂无

中图分类号：

TP39 [计算机的应用];

学科分类号：

081203 ; 0835 ;

摘要：

The extremely populated state of current ICs have motivated for advanced High-level Synthesis techniques to be used for specialized circuits. Due to the complexity and lack of flexibility of existing High-level Synthesis tools, most of the low level circuits such as signal coding blocks were left out of the EDA scope and to the responsibility of layout engineers. In this paper we present a High-level Synthesis approach which is suitable for both complex and low level custom block design. The advantage of this approach is a uniform and formal treatment of both high-level and low-level design, as well as provably correct results.

引用

页码：90 / 94

页数：5

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