Parallel architecture for video processing in a smart camera system

被引：1
|
作者：
Lv, T [1 ]
Ozer, B [1 ]
Wolf, W [1 ]
机构：
[1] Princeton Univ, Dept Elect Engn, Princeton, NJ 08544 USA
来源：
2002 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS | 2002年
关键词：
Algorithm design and analysis; Computer architecture; Data analysis; Hardware; Humans; Parallel architectures; Parallel processing; Real time systems; Smart cameras; VLIW;
D O I：
10.1109/SIPS.2002.1049677
中图分类号：
TP31 [计算机软件];
学科分类号：
081202 ; 0835 ;
摘要：
in this paper, we present our research on parallel architectures for a smart camera system. We analyze the available data independencies for a particular application, namely human detection and activity recognition, and discuss the potential architectures to exploit the parallelism resulted from these independencies. Three architectures - VLIW, symmetric parallel, and macro-pipeline architectures are discussed and their performances are presented.
引用
收藏
页码：9 / 14
页数：6
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