Application of Silicon Stress Sensor in Flip Chip Packaging System

被引：0

作者：

Jiang, Chengjie ^{[1
]}

Xiao, Fei ^{[1
]}

Yang, Heng ^{[2
]}

Dou, Chuanguo ^{[2
]}

机构：

[1] Fudan Univ, Dept Mat Sci, 220 Handan Rd, Shanghai 200433, Peoples R China

[2] Shanghai Inst Microsyst & Informat Technol, Shanghai 200233, Peoples R China

来源：

2011 12TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY AND HIGH DENSITY PACKAGING (ICEPT-HDP) | 2011年

关键词：

stress sensor; flip chip; underfill; chip size;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Flip chip packaging system consists of different materials in the connecting parts, and has an undesirable stress distribution on the chips. Large residual strain will lead to a deterioration of the circuit performance, andresearchers are working to reduce the residual strain in the packaging system. In our work, a silicon stress sensor chip is fabricated to measure the stress distribution in flip chip packaging system, and four point bending method is used to calibrate the piezoresistance coefficients. The effects on residual strain caused by chip size, location, underfills, and the packaging process are tested, and a relationship between the parameters above and stress distribution is discussed.

引用

页码：933 / 937

页数：5

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