Network on chip using a reconfigurable platform

被引：0

作者：

Sun, LP ^{[1
]}

Aboulhamid, EM ^{[1
]}

David, JP ^{[1
]}

机构：

[1] Univ Montreal, DIRO, Montreal, PQ H3C 3J7, Canada

来源：

PROCEEDINGS OF THE 46TH IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS & SYSTEMS, VOLS 1-3 | 2003年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper describes the design and FPGA implementation of a 3-dimensional hypercube multiprocessor network embedding 7 Xilinx MicroBlaze soft processors and one ARM7TDMI hard processor. The MicroBlaze network is synthesized in a XCV2000E FPGA (Xilinx). The whole system is running on the CMC Rapid Prototyping Platform. C language has been used to implement and test a parallel version of the "sort and merge" algorithm. Preliminary results show that the computation time can be reduced by a factor 3 when using 4 processors.

引用

页码：819 / 822

页数：4

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