A postprocessing procedure to reduce the number of different test lengths in a test set for scan circuits

A test for a scan design typically starts with a scan-in operation followed by one or more primary input vectors, and ends with a scan-out operation. The length of a test is defined to be the number of primary input vectors included in it. We describe a procedure for reducing the number of different test lengths in a test set TS for a scan circuit. Reducing the number of different lengths reduces the complexity of applying TS to the circuit. The procedure we describe is a postprocessing procedure applied after test generation, and it does not require any modifications to the test generation procedure. A test length L-i is eliminated from TS by replacing all the tests of length L-i by tests of length L-j that exists in TS. In the first phase of the procedure, L-j < L-i. In the second phase, L-j > L-i. We present experimental results to demonstrate that significant reductions in the number of test lengths are possible.