A 1.5 GHz Spread Spectrum Clock Generator with a 5000ppm Piecewise Linear Modulation

被引：11

作者：

Song, Minyoung ^{[1
]}

Ahn, Sunghoon ^{[1
]}

Jung, Inhwa ^{[1
]}

Kirn, Yongtae ^{[1
]}

Kim, Chulwoo ^{[1
]}

机构：

[1] Korea Univ, Seoul, South Korea

来源：

PROCEEDINGS OF THE IEEE 2008 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2008年

关键词：

D O I：

10.1109/CICC.2008.4672119

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A spread spectrum clock generator is implemented in a 0.18 mu m CMOS process employing the proposed piecewise linear modulation profile to significantly reduce EMI with a simple implementation. A high resolution fractional divider to reduce quantization noise from the modulation is proposed as well. A peak power reduction level of 14.2dB with 5000ppm down spreading and 27.88ps(pp) of jitter in the SSCG without modulation are measured.

引用

页码：455 / 458

页数：4

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