Power amplifier resilient design for process, voltage, and temperature variations

被引：3
|
作者：
Yuan, J. S. [1 ]
Kritchanchai, E. [1 ]
机构：
[1] Univ Cent Florida, Dept Elect Engn & Comp Sci, Orlando, FL 32816 USA
来源：
MICROELECTRONICS RELIABILITY | 2013年 / 53卷 / 06期
关键词：
Power amplifiers;
D O I：
10.1016/j.microrel.2013.02.003
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents RF power amplifier adaptive body bias compensation technique for output power and power-added efficiency resilient to process, supply voltage, and temperature (PVT) variations. The adaptive body biasing scheme uses a current source for PVT sensing to provide resilience through the threshold voltage adjustment to maintain power amplifier performance over a wide range of variability. Analytical equations are derived for physical insight. ADS simulation results show that the resilient body biasing design improves the robustness of the power amplifier in output power and power-added efficiency over process, supply voltage, and temperature variations. (C) 2013 Elsevier Ltd. All rights reserved.
引用
收藏
页码：856 / 860
页数：5
相关论文
共 50 条
  • [31] Voltage Mode Doherty Power Amplifier
    Vorapipat, Voravit
    Levy, Cooper S.
    Asbeck, Peter M.
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2017, 52 (05) : 1295 - 1304
  • [32] Variations-aware low-power design with voltage scaling
    Azizi, N
    Khellah, MM
    De, V
    Najm, FN
    42ND DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2005, 2005, : 529 - 534
  • [33] Temperature and process variations aware power gating of functional units
    Kannan, Deepa
    Shrivastava, Aviral
    Mohan, Vipin
    Bhardwaj, Sarvesh
    Vrudhula, Sarma
    21ST INTERNATIONAL CONFERENCE ON VLSI DESIGN: HELD JOINTLY WITH THE 7TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS, PROCEEDINGS, 2008, : 515 - +
  • [34] Power reduction of functional units considering temperature and process variations
    Kannan, Deepa
    Shrivastava, Aviral
    Bhardwaj, Sarvesh
    Vrudhula, Sarma
    21ST INTERNATIONAL CONFERENCE ON VLSI DESIGN: HELD JOINTLY WITH THE 7TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS, PROCEEDINGS, 2008, : 533 - +
  • [35] Design of a 70 GHz power amplifier using a digital InPHBT process
    O'Sullivan, Tomas
    Le, Minh
    Partyka, Paul
    Milano, Ray
    Asbeck, Peter M.
    PROCEEDINGS OF THE 2007 IEEE BIPOLAR/BICMOS CIRCUITS AND TECHNOLOGY MEETING (BCTM), 2007, : 214 - +
  • [36] Design of monolithic RF power amplifier using bulk BiCMOS process
    Chan, WC
    Mok, PKT
    Sin, JKO
    Ng, WT
    42ND MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS, VOLS 1 AND 2, 1999, : 10 - 13
  • [37] On a design of 5GHz linear power amplifier with MOS process
    Fukuda, Kouichi
    Ohno, Takuya
    Muto, Cosy
    IEEJ Transactions on Electronics, Information and Systems, 2009, 129 (08) : 1476 - 1482
  • [38] Time-domain writing architecture for multilevel RRAM cells resilient to temperature and process variations
    de Gracia Herranz, Amadeo
    Lopez-Vallejo, Marisa
    INTEGRATION-THE VLSI JOURNAL, 2020, 75 (75) : 141 - 149
  • [39] High Linearity MMIC Power Amplifier Design with Controlled Junction Temperature
    Silva, Oliver
    Angelov, Iltcho
    Zirath, Herbert
    Rorsman, Niklas
    2014 INTERNATIONAL WORKSHOP ON INTEGRATED NONLINEAR MICROWAVE AND MILLIMETRE-WAVE CIRCUITS (INMMIC), 2014,
  • [40] Design of low voltage operational amplifier
    Jamuar, SS
    Kit, TK
    2004 IEEE International Conference on Semiconductor Electronics, Proceedings, 2004, : 552 - 554
12345