Performance Study of Two-Dimensional Orthogonal Systolic Array Matric Multiplication

被引:0
|
作者
Shapri, A. H. M. [1 ]
Rahman, N. A. Z. [1 ]
Mazalan, M. [1 ]
机构
[1] Univ Malaysia Perlis, Sch Microelect Engn, Jejawi 02600, Perlis, Malaysia
来源
INFORMATICS ENGINEERING AND INFORMATION SCIENCE, PT II | 2011年 / 252卷
关键词
orthogonal systolic array; matrix multiplication; perl scripting;
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
The systolic array implementation of artificial neural networks is one of the ideal solutions for communication problems generated by highly interconnected neurons. A systolic array is an arrangement of processors in an array where data flows synchronously across the array between neighbours, usually with different data flowing in different directions. The simulation of systolic array for matrix multiplication is the practical application in order to evaluate the performance of systolic array. In this paper, a two-dimensional orthogonal systolic array for matrix multiplication is presented. Perl scripting language is used to simulate a two-dimensional orthogonal systolic array compared to conventional matrix multiplication in terms of average execution time. The comparison is made using matrices of size 5xM versus Mx5 which M ranges from 1 to 10, 10 to 100 and 100 to 1000. The orthogonal systolic array results show better average execution time when M is more than 30 compared to conventional matrix multiplication when the size of the matrix multiplication is increased.
引用
收藏
页码:1 / 13
页数:13
相关论文
共 50 条
  • [41] Protocols for finding the most orthogonal dimensions for two-dimensional high performance liquid chromatography
    Bassanese, Danielle N.
    Hollan, Brendan J.
    Conlan, Xavier A.
    Francis, Paul S.
    Barnett, Neil W.
    Stevenson, Paul G.
    TALANTA, 2015, 134 : 402 - 408
  • [42] Hierarchical verification of two-dimensional high-speed multiplication in PVS: A case study
    Ruess, H
    FORMAL METHODS IN COMPUTER-AIDED DESIGN, 1996, 1166 : 79 - 93
  • [43] Performance evaluation of one dimensional systolic array for FFT processor
    Nandi, Anil
    Patil, Sujata
    2007 INTERNATIONAL CONFERENCE OF SIGNAL PROCESSING, COMMUNICATIONS AND NETWORKING, VOLS 1 AND 2, 2006, : 168 - +
  • [44] APPLICATION OF ORTHOGONAL MAPPING TO SOME TWO-DIMENSIONAL DOMAINS
    CHIKHLIWALA, ED
    YORTSOS, YC
    JOURNAL OF COMPUTATIONAL PHYSICS, 1985, 57 (03) : 391 - 402
  • [45] Stokes flow in a junction of two-dimensional orthogonal channels
    Mustapha Hellou
    Thi Diep Phuong Bach
    Zeitschrift für angewandte Mathematik und Physik, 2011, 62 : 135 - 147
  • [46] Resource augmentation in two-dimensional packing with orthogonal rotations
    Correa, JR
    OPERATIONS RESEARCH LETTERS, 2006, 34 (01) : 85 - 93
  • [47] Orthogonal Implementation of Two-Dimensional Separable Denominator Systems
    Wirski, Robert T.
    Strzeszewski, Bogdan
    Wawryn, Krzysztof
    INTERNATIONAL CONFERENCE ON SIGNALS AND ELECTRONIC SYSTEMS (ICSES '10): CONFERENCE PROCEEDINGS, 2010, : 371 - 374
  • [48] Research on Nearly Orthogonal Two-Dimensional Grid Generation
    Su, B. L.
    Wei, W. L.
    MECHANICAL AND ELECTRONICS ENGINEERING III, PTS 1-5, 2012, 130-134 : 2981 - +
  • [49] On constructions for optimal two-dimensional optical orthogonal codes
    Jianmin Wang
    Xiuling Shan
    Jianxing Yin
    Designs, Codes and Cryptography, 2010, 54 : 43 - 60
  • [50] Two-dimensional orthogonal tiling: From theory to practice
    Andonov, R
    Bourzoufi, H
    Rajopadhye, S
    3RD INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING, PROCEEDINGS, 1996, : 225 - 231