Performance Evaluation of Heart Sound Cancellation in FPGA Hardware Implementation for Electronic Stethoscope

被引:9
|
作者
Chao, Chun-Tang [1 ]
Maneetien, Nopadon [1 ]
Wang, Chi-Jo [1 ]
Chiou, Juing-Shian [1 ]
机构
[1] Southern Taiwan Univ Sci & Technol, Dept Elect Engn, Tainan 71005, Taiwan
来源
关键词
LUNG SOUNDS; NOISE REDUCTION; INTERFERENCE; RECORDINGS;
D O I
10.1155/2014/587238
中图分类号
O [数理科学和化学]; P [天文学、地球科学]; Q [生物科学]; N [自然科学总论];
学科分类号
07 ; 0710 ; 09 ;
摘要
This paper presents the design and evaluation of the hardware circuit for electronic stethoscopes with heart sound cancellation capabilities using field programmable gate arrays (FPGAs). The adaptive line enhancer (ALE) was adopted as the filtering methodology to reduce heart sound attributes from the breath sounds obtained via the electronic stethoscope pickup. FPGAs were utilized to implement the ALE functions in hardware to achieve near real-time breath sound processing. We believe that such an implementation is unprecedented and crucial toward a truly useful, standalone medical device in outpatient clinic settings. The implementation evaluation with one Altera cyclone II-EP2C70F89 shows that the proposed ALE used 45% resources of the chip. Experiments with the proposed prototype were made using DE2-70 emulation board with recorded body signals obtained from online medical archives. Clear suppressions were observed in our experiments from both the frequency domain and time domain perspectives.
引用
收藏
页数:7
相关论文
共 50 条
  • [31] Design of an Adaptive Sinusoid Interference Cancellation Algorithm using FPGA and Its Performance Evaluation
    He, Kuihua
    Zhou, Guofei
    Zhou, Xiaobo
    PROCEEDINGS OF 2018 IEEE 3RD ADVANCED INFORMATION TECHNOLOGY, ELECTRONIC AND AUTOMATION CONTROL CONFERENCE (IAEAC 2018), 2018, : 958 - 963
  • [32] Design of ear-contactless stethoscope and improvement in the performance of deep learning based on CNN to classify the heart sound
    Tanmay Sinha Roy
    Joyanta Kumar Roy
    Nirupama Mandal
    Medical & Biological Engineering & Computing, 2023, 61 : 2417 - 2439
  • [33] Design of ear-contactless stethoscope and improvement in the performance of deep learning based on CNN to classify the heart sound
    Roy, Tanmay Sinha
    Roy, Joyanta Kumar
    Mandal, Nirupama
    MEDICAL & BIOLOGICAL ENGINEERING & COMPUTING, 2023, 61 (09) : 2417 - 2439
  • [34] Design, Hardware Implementation on FPGA and Performance Analysis of Three Chaos-Based Stream Ciphers
    Dridi, Fethi
    El Assad, Safwan
    Youssef, Wajih El Hadj
    Machhout, Mohsen
    FRACTAL AND FRACTIONAL, 2023, 7 (02)
  • [35] FPGA Design and Hardware Implementation of Heart Disease Diagnosis System Based on NVG-RAM Classifier
    Hasan, Tabreer T.
    Jasim, Manal H.
    Hashim, Ivan A.
    2018 THIRD SCIENTIFIC CONFERENCE OF ELECTRICAL ENGINEERING (SCEE), 2018, : 33 - 38
  • [36] Implementation and performance evaluation of hardware accelerated IPSec VPN for the home gateway
    Park, MH
    Beom, MJ
    Park, WK
    Jeong, YK
    Paik, EH
    7th International Conference on Advanced Communication Technology, Vols 1 and 2, Proceedings, 2005, : 1007 - 1010
  • [37] Performance evaluation of STRON: A hardware implementation of a real-time OS
    Nakano, T
    Komatsudaira, Y
    Shiomi, A
    Imai, M
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 1999, E82A (11): : 2375 - 2382
  • [38] Design, simulation and hardware implementation of a Digital Television System: Performance evaluation
    Oliveira, Fabricio C. A.
    Guimaraes, Dayan A.
    Gomes, Geraldo G. R.
    Cardoso, Fabbryccio A. C. M.
    Gomes, Fabio A. L.
    Fernandes, Marcelo A. C.
    2006 IEEE NINTH INTERNATIONAL SYMPOSIUM ON SPREAD SPECTRUM TECHNIQUES AND APPLICATIONS, PROCEEDINGS, 2006, : 213 - 217
  • [39] Performance evaluation of a FPGA implementation of a digital rotation support vector machine
    Lamela, Horacio
    Gimeno, Jesus
    Jimenez, Matias
    Ruiz, Marta
    INDEPENDENT COMPONENT ANALYSES, WAVELETS, UNSUPERVISED NANO-BIOMIMETIC SENSORS, AND NEURAL NETWORKS VI, 2008, 6979
  • [40] Performance evaluation of RFID anti-collision algorithm with FPGA implementation
    Ning, Huansheng
    Cong, Yu
    Xu, Z-Q
    Hong, T.
    Zhao, J-C
    Zhang, Yan
    21ST INTERNATIONAL CONFERENCE ON ADVANCED NETWORKING AND APPLICATIONS WORKSHOPS/SYMPOSIA, VOL 2, PROCEEDINGS, 2007, : 153 - +