A reconfigurable routing algorithm for a fault-tolerant 2D-Mesh Network-on-Chip

被引：0
|
作者：
Zhang, Zhen [1 ]
Greiner, Alain [1 ]
Taktak, Sami [1 ]
机构：
[1] Univ Paris 06, 4 Pl Jussieu, F-75252 Paris, France
来源：
2008 45TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2 | 2008年
关键词：
2D-Mesh NoC; fault-tolerant; routing algorithm; MP2-SoC; reconfiguration; DSPIN;
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
In this paper we present a reconfigurable routing algorithm for a 2D-Mesh Network-on-Chip (NoC) dedicated to fault-tolerant, Massively Parallel Multi-Processors Systems on Chip (MP2-SoC). The routing algorithm can be dynamically reconfigured, to adapt to the modification of the micro-network topology caused by a faulty router. This algorithm has been implemented in a reconfigurable version of the DSPIN micro-network, and evaluated from the point of view of performance (penalty on the network saturation threshold), and cost (extra silicon area occupied by the reconfigurable version of the router).
引用
收藏
页码：441 / +
页数：2
相关论文
共 50 条
  • [1] An Enhanced Fault-Tolerant Routing Algorithm for Mesh Network-on-Chip
    Rezazadeh, Arshin
    Fathy, Mahmood
    Rahnavard, Gholamali
    [J]. 2009 INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS, PROCEEDINGS, 2009, : 505 - +
  • [2] A Hardware-Oriented Fault-Tolerant Routing Algorithm for Irregular 2D-Mesh Network-on-Chip without Virtual Channels
    Fukushima, Yusuke
    Fukushi, Masaru
    Yairi, Ikuko Eguchi
    Hattori, Takeshi
    [J]. 2010 IEEE 25TH INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS (DFT 2010), 2010, : 52 - 59
  • [3] RFRA: Reconfigurable and Fault-tolerant Routing Algorithm without virtual channels for 2D Network-on-Chip
    Xie, Ruilian
    Cai, Jueping
    Wang, Peng
    [J]. 2016 13TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT), 2016, : 1615 - 1617
  • [4] TRACK: An algorithm for fault-tolerant, dynamic and scalable 2D mesh network-on-chip routing reconfiguration
    Jain, Anugrah
    Laxmi, Vijay
    Tripathi, Meenakshi
    Gaur, Manoj Singh
    Bishnoi, Rimpy
    [J]. INTEGRATION-THE VLSI JOURNAL, 2020, 72 : 92 - 110
  • [5] ERFAN: Efficient Reconfigurable Fault-Tolerant Deflection Routing Algorithm for 3-D Network-on-Chip
    Maabi, Somayeh
    Safaei, Farshad
    Rezaei, Amin
    Daneshtalab, Masoud
    Zhao, Dan
    [J]. 2016 29TH IEEE INTERNATIONAL SYSTEM-ON-CHIP CONFERENCE (SOCC), 2016, : 306 - 311
  • [6] Study of Fault-Tolerant Routing Algorithm of NoC Based on 2D-Mesh Topology
    Jiang, Shu Yan
    Liu, Yue
    Luo, Jiang Bo
    Cheng, He
    Luo, Gang
    [J]. 2013 IEEE INTERNATIONAL CONFERENCE ON APPLIED SUPERCONDUCTIVITY AND ELECTROMAGNETIC DEVICES (ASEMD), 2013, : 189 - 193
  • [7] A Fault-Tolerant Deflection Routing for Network-on-Chip
    Zhou, Xiaofeng
    Liu, Lu
    Zhu, Zhangming
    [J]. JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2017, 26 (03)
  • [8] Design of an extended 2D mesh network-on-chip and development of A fault-tolerant routing method
    Kurokawa, Yota
    Fukushi, Masaru
    [J]. IET COMPUTERS AND DIGITAL TECHNIQUES, 2019, 13 (03): : 224 - 232
  • [9] An Innovative Fault-Tolerant Method for 2-D Mesh-Based Network-on-Chip Routing
    Mohtashamzadeh, Mehdi
    Momeni, Ladan
    Rezazadeh, Arshin
    [J]. UKSIM FIFTH EUROPEAN MODELLING SYMPOSIUM ON COMPUTER MODELLING AND SIMULATION (EMS 2011), 2011, : 339 - 343
  • [10] Generation and Performance Evaluation of Reconfigurable Fault Tolerant Routing Algorithm for 2D-Mesh NoC
    Singh, Sandeep Kr
    Mondal, Abir J.
    Majumder, Alak
    [J]. 3RD INTERNATIONAL CONFERENCE ON RECENT TRENDS IN COMPUTING 2015 (ICRTC-2015), 2015, 57 : 232 - 240
12345