Design, development and verification of a new multilevel inverter for reduced power switches

Due to recent developments in the field of high-power and medium-voltage, the multilevel inverter has raised to such an extent owing to some of its amazing facts regarding harmonic spectrum, ease in control, reduced electromagnetic interference (EMI), filter -less circuit, stress on power switches, common-mode voltage. This paper well describes a novel architecture of a single-phase multilevel inverter using a lesser number of overall components, especially the power switches. The proposed topology is generalized in the structure that can generate any number of voltage steps. A 7-level structure of the proposed topology is explained and is elaborately discussed. Simulation is carried out in MATLAB and corresponding experimental results verify the existence of the proposed multilevel inverter. The real-time experimental results were presented and are well verified by the simulation results for 7-level as well for 13-level across RL-Load. The nature of load current is also indicated as per the nature of load voltage. Nevertheless, the topology is further compared with some of the recent literature and found superior in each respect.