Fault-Tolerant Reconfigurable 32-bit ALU for Space Applications

Space application Integrated Circuits (ICs) are prone to radiation particles, which are present in the form of electrons, protons, and heavy ions, generated from solar flares or space radiations. The circuits utilized in space applications must be able to tolerate these radiation impacts and assure reliable functionality. In this work, we have explored the impact of single-event upsets (SEUs) on 65 nm Bulk CMOS technology and proposed a power-efficient, radiation-hardened, reconfigurable 32-bit arithmetic logic unit (ALU) system, that works reliably in the presence of SEUs. The proposed architecture uses the concept of triple modular redundancy (TMR) with area-efficient voter logic, and error detector logic for radiation hardness. Fault tolerance has been verified by post-layout simulation of the proposed ALU with modelled radiation-induced SEUs error injection. The proposed model is designed and simulated on a 65 nm Bulk CMOS technology node. The active area of the proposed ALU is 0.04 mm(2), and it consumes 2.8906 mW power at 1.2 V supply voltage.