Metal Wafer Bonding for 3D Interconnects and Advanced Packaging

被引:0
|
作者
Dragoi, V. [1 ]
Pabo, E. [2 ]
Wagenleitner, T. [1 ]
Floetgen, C. [1 ]
Rebhan, B. [1 ]
Corn, K. [2 ]
机构
[1] EV Grp, DI E Thallner Str 1, A-4782 St Florian, Austria
[2] EV Grp Inc, Tempe, AZ 85284 USA
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Metal films can be used as bonding layers at wafer-level in manufacturing processes for device assembly as well as just for electrical integration of different components. One has to distinguish between two categories of processes: metal thermo-compression bonding on one side, and bonding with formation of a eutectic or an intermetallic alloy layer. The different process principles determine also the applications area for each. From electrical interconnections to wafer-level packaging (with special emphasis on vacuum packaging) metal wafer bonding is a very important technology in manufacturing processes.
引用
收藏
页码:114 / 120
页数:7
相关论文
共 50 条
  • [31] Dielectric glue wafer bonding for 3D ICs
    Kwon, Y
    Jindal, A
    McMahon, JJ
    Lu, JQ
    Gutmann, RJ
    Cale, TS
    MATERIALS, TECHNOLOGY AND RELIABILITY FOR ADVANCED INTERCONNECTS AND LOW-K DIELECTRICS-2003, 2003, 766 : 27 - 32
  • [32] Wafer bonding for 3D integration of MEMS/CMOS
    Gracias, Alison
    Castracane, Jarnes
    Xu, Bai
    RELIABILITY, PACKAGING, TESTING, AND CHARACTERIZATION OF MEMS/ MOEMS V, 2006, 6111
  • [33] Low Temperature Wafer Bonding for 3D Applications
    Burggraf, J.
    Bravin, J.
    Wiesbauer, H.
    Dragoi, V.
    PROCESSING, MATERIALS, AND INTEGRATION OF DAMASCENE AND 3D INTERCONNECTS 5, 2014, 58 (17): : 67 - 73
  • [34] Wafer and Die Bonding Technologies for 3D Integration
    Farrens, Shari
    MATERIALS AND TECHNOLOGIES FOR 3-D INTEGRATION, 2009, 1112 : 55 - 65
  • [35] Robust Measurement of Bonding Strength for Wafer-to-Wafer 3D Integration
    Fuse, Junya
    Iwata, Tomoya
    Ebiko, Sodai
    Inoue, Fumihiro
    2023 International Conference on Electronics Packaging, ICEP 2023, 2023, : 105 - 106
  • [36] Reconfigured Wafer-on-Wafer 3D Integration with Meta Bonding Technologies
    Fukushima, Takafumi
    2024 IEEE INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE, IITC 2024, 2024,
  • [37] Thermal stresses in 3D IC inter-wafer interconnects
    Zhang, J
    Bloomfield, MO
    Lu, JQ
    Gutmann, RJ
    Cale, TS
    MICROELECTRONIC ENGINEERING, 2005, 82 (3-4) : 534 - 547
  • [38] Low Temperature Wafer Bonding for Wafer-Level 3D Integration
    Dragoi, V.
    Rebhan, B.
    Burggraf, J.
    Razek, N.
    2014 4TH IEEE INTERNATIONAL WORKSHOP ON LOW TEMPERATURE BONDING FOR 3D INTEGRATION (LTB-3D), 2014, : 9 - 9
  • [39] 3D System-on-a-chip using dielectric glue bonding and Cu damascene inter-wafer interconnects
    Lu, JQ
    Jindal, A
    Kwon, Y
    McMahon, JJ
    Lee, KW
    Kraft, RP
    Altemus, B
    Cheng, D
    Eisenbraun, E
    Cale, TS
    Gutmann, RJ
    THIN FILM MATERIALS, PROCESSES, AND RELIABILITY: PLASMA PROCESSING FOR THE 100 NM NODE AND COPPER INTERCONNECTS WITH LOW-K INTER-LEVEL DIELECTRIC FILMS, 2003, 2003 (13): : 381 - 389
  • [40] Investigation of optical properties of benzocyclobutene wafer bonding layer used for 3D interconnects via infrared spectroscopic ellipsometry
    Kamineni, Vimal K.
    Singh, Pratibha
    Kong, LayWai
    Hudnall, John
    Qureshi, Jamal
    Taylor, Chris
    Rudack, Andy
    Arkalgud, Sitaram
    Diebold, Alain C.
    THIN SOLID FILMS, 2011, 519 (09) : 2924 - 2928