A 590 μW, 106.6 dB SNDR, 24 kHz BW Continuous-Time Zoom ADC with a Noise-Shaping 4-bit SAR ADC

被引：6

作者：

Mehrotra, Shubham ^{[1
,2
]}

Eland, Efraim ^{[1
]}

Karmakar, Shoubhik ^{[1
]}

Liu, Angqi ^{[1
]}

Gonen, Burak ^{[1
,3
]}

Bolatkale, Muhammed ^{[1
,2
]}

Van Veldhoven, Robert ^{[2
]}

Makinwa, Kofi A. A. ^{[1
]}

机构：

[1] Delft Univ Technol, Delft, Netherlands

[2] NXP Semicond, Eindhoven, Netherlands

[3] Ethernovia, Zeist, Netherlands

来源：

ESSCIRC 2022- IEEE 48TH EUROPEAN SOLID STATE CIRCUITS CONFERENCE (ESSCIRC) | 2022年

关键词：

A/D conversion; audio analog to digital converter (ADC); continuous-time delta-sigma ADC; dynamic zoom ADC; low-power circuits; noise-shaping SAR ADC; high linearity operational transconductance amplifier (OTA);

D O I：

10.1109/ESSCIRC55480.2022.9911295

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents a continuous-time zoom ADC for audio applications. It combines a 4-bit noise-shaping coarse SAR ADC and a fine delta-sigma modulator with a tail-resistor linearized OTA for improved linearity, energy efficiency, and handling of out-of-band interferers compared to previous designs. In 160 nm CMOS, the prototype chip occupies 0.36 mm(2), achieves 107.2 dB SNR, 106.6 dB SNDR, and 107.3 dB dynamic range in a 24 kHz bandwidth while consuming 590 mu W from a 1.8 V supply. This translates into a Schreier figure-of-merit (FoMs) of 183.4 dB and a FoMSNDR of 182.7 dB.

引用

页码：253 / 256

页数：4

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