Low Temperature Wafer Bonding of CMOS Wafers

被引:0
|
作者
Dragoi, V. [1 ]
Matthias, T. [1 ]
Rebhan, B. [1 ]
Huysmans, F. [1 ]
机构
[1] EV Grp, A-4782 St Florian Inn, Austria
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The continuous need for consumer electronics miniaturization requires not only size shrinking, but also higher degree of integration. The new demands imposed wafer bonding as an attractive technology for wafer-level integration. The resulting increased complexity of the devices brings new challenges to the processing techniques. In manufacturing processes wafer bonding can be used for integration of the electronic components (e.g. Complementary Metal-Oxide- Semiconductor - CMOS - circuitries) with the mechanical (e.g. resonators) or optical components (e.g. waveguides, mirrors) in a single, wafer-level process step. Wafer bonding using CMOS waters brings additional challenges due to very strict specific requirements, particularly in terms of process temperature and contamination. These challenges were identified and wafer bonding process solutions will be presented illustrated with examples.
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收藏
页码:197 / 201
页数:5
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