A 96-dB CMOS Programmable Gain Amplifier for Low-IF GPS Receiver

被引：0
|
作者：
Liang, Dongguo [1 ]
Ye, Qing [1 ]
机构：
[1] Chinese Acad Sci, Inst Microelect, As & Syst Dept, Beijing, Peoples R China
来源：
2008 INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CIRCUITS AND SYSTEMS PROCEEDINGS, VOLS 1 AND 2: VOL 1: COMMUNICATION THEORY AND SYSTEM | 2008年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A programmable gain amplifier (PGA) was designed for a Low-IF GPS receiver. Linearity method which was based on the differential degeneration and gm boost structure was used in the circuit. Transistors which were working in the sub-threshold region were applied in the built-in DC-Offset correction circuit. This PGA provided a 96-dB digitally controlled gain range with a step of 6-dB, and the overall gain accuracy was 0.03dB. The 3dB bandwidth of the PGA was 300MHz. The noise figure at the maximum gain was 23.7dB. The IIP3 was -5dBm for the minimum gain. The PGA was implemented in a 0.18um CMOS process and approximately occupied 0.097mm2. This PGA consumed 3.5mA at a 1.8V supply.
引用
收藏
页码：104 / 107
页数：4
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