A Retention-Aware Multilevel Cell Phase Change Memory Program Evaluation Metric

被引：6

作者：

Khwa, Win-San ^{[1
,2
]}

Chang, Meng-Fan ^{[2
]}

Wu, Jau-Yi ^{[1
]}

Lee, Ming-Hsiu ^{[1
]}

Su, Tzu-Hsiang ^{[1
]}

Wang, Tien-Yen ^{[1
]}

Li, Hsiang-Pang ^{[1
]}

BrightSky, Matthew ^{[3
]}

Kim, SangBum ^{[3
]}

Lung, Hsiang-Lan ^{[1
]}

Lam, Chung ^{[3
]}

机构：

[1] Macronix Int Co Ltd, Hsinchu 30078, Taiwan

[2] Natl Tsing Hua Univ, Hsinchu 30013, Taiwan

[3] IBM TJ Watson Res Ctr, Yorktown Hts, NY 10598 USA

来源：

IEEE ELECTRON DEVICE LETTERS | 2016年 / 37卷 / 11期

关键词：

Phase change memory; multiple-level cell; programming scheme; resistance drift; RELAXATION; RESISTANCE; DRIFT;

D O I：

10.1109/LED.2016.2614513

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Multilevel cell (MLC) phase change memory (PCM) offers many potential advantages in scalability, bit-alterability, non-volatility, and high program speed. While many program approaches had been proposed, they were usually evaluated in energy, delay, or energy-delay product (EDP). These metrics, however, often overlook the data integrity maintenance (DIM) overhead caused by the resistance drift (R-drift) phenomenon in the MLC PCM. This letter proposes a programmaintenance (PM) metric, which is a modified EDP metric with DIM consideration. Furthermore, we evaluated the PM metric of various pulse shapes in iterative program-verify scheme. From the measured data of a 128M-cell MLC PCM chip, we showed that the PM metric of optimized pulse shape is better than those of the conventional SET and RESET pulse shapes up to 86.7%.

引用

页码：1422 / 1425

页数：4

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