Surface-Potential-Based Drain Current Model for Polycrystalline Silicon Thin-Film Transistors

被引：9

作者：

Tsuji, Hiroshi ^{[1
]}

Kuzuoka, Tsuyoshi ^{[1
]}

Kishida, Yuji ^{[1
]}

Shimizu, Yoshiyuki ^{[1
]}

Kirihara, Masaharu ^{[1
]}

Kamakura, Yoshinari ^{[1
]}

Morifuji, Masato ^{[1
]}

Shimizu, Yoshiteru ^{[2
]}

Miyano, Soichiro ^{[2
]}

Taniguchi, Kenji ^{[1
]}

机构：

[1] Osaka Univ, Div Elect Elect & Informat Engn, Osaka 5650871, Japan

[2] Adv LCD Technol Dev Ctr Co Ltd, Totsuka Ku, Yokohama, Kanagawa 2440817, Japan

来源：

JAPANESE JOURNAL OF APPLIED PHYSICS | 2008年 / 47卷 / 10期

关键词：

poly-Si TFT; surface potential; drain current; compact model;

D O I：

10.1143/JJAP.47.7798

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

A surface-potential-based compact model for polycrystalline silicon (poly-Si) thin-film transistors (TFTs) was developed, accounting for the effects of both deep and tail states across the band gap. The model describes the drain current in all regions of operation using the unified equation without the use of threshold voltage as an input parameter. Calculations using the drain current model produce results that are in good agreement with the measured current-voltage characteristics of poly-Si TFTs. [DOI: 10.1143/JJAP.47.7798]

引用

页码：7798 / 7802

页数：5

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