A sub-μW Bio-potential Front End in 65nm CMOS

被引：0

作者：

Kifle, Yonatan ^{[1
]}

Saleh, Hani ^{[1
]}

Mohammad, Baker ^{[1
]}

Ismail, Mohammed ^{[1
]}

机构：

[1] Khalifa Univ Sci & Technol, KSRC, Abu Dhabi, U Arab Emirates

来源：

2017 IFIP/IEEE INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION (VLSI-SOC) | 2017年

关键词：

Analog front end; bio-potential amplifier and chopper stabilized amplifier;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A bio-potential amplifier intended for continuous monitoring of vitals characterized by its long operational lifetime is required to operate at the lowest power budget possible. Moreover, a compact active area directly related to portability is essential. This paper presents a 0.55 mu W auto gain controlled bio-potential amplifier implemented in 65nm 1P7M CMOS for ECG signal classifier SoC. A chopper-stabilized amplifier is designed at 0.6V supply voltage to mitigate the DC offset and near DC flicker noise. The input ECG signal level is further set by the four gain levels of the variable gain amplifier (VGA) to provide maximum swing to the ADC. The whole system is integrated into a core are of 0.10mm(2) and can operate at a wide range of 0.6-1.2V supply voltage.

引用

页码：60 / 63

页数：4

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